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PC28F640P33BF60D Datasheet(PDF) 16 Page - Numonyx B.V |
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PC28F640P33BF60D Datasheet(HTML) 16 Page - Numonyx B.V |
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16 / 88 page  P33-65nm Datasheet Jul 2011 16 Order Number: 208034-04 6.0 Command Set 6.1 Device Command Codes The flash Command User Interface (CUI) provides access to device read, write, and erase operations. The CUI does not occupy an addressable memory location; it is part of the internal logic which allows the flash device to be controlled. The Write State Machine provides the management for its internal erase and program algorithms. Commands are written to the CUI to control flash device operations. Table 5, “Command Codes and Definitions” describes all valid command codes. For operations that involve multiple command cycles, the possibility exists that the subsequent command does not get issued in the proper sequence. When this happens, the CUI sets Status Register bits SR[5,4] to indicate a command sequence error. Some applications use illegal or invalid commands (like 0x00) accidentally or intentionally with the device. An illegal or invalid command doesn't change the device output state compared with the previous operation on 130nm device. But the output will change to Read Status Register mode on 65nm device. After an illegal or invalid command, software may attempt to read the device. If the previous state is read array mode before an illegal command, software will expect to read array data on 130nm device, such as 0xFFFF in an unprogrammed location. On the 65nm device, software may not get the expected array data and instead the status register is read. Please refer to the legal and valid commands/spec defined in the Datasheet, such as for read mode, issue 0xFF to Read Array mode, 0x90 to Read Signature, 0x98 to Read CFI/ OTP array mode. Table 5: Command Codes and Definitions (Sheet 1 of 3) Mode Code Device Mode Description Read 0xFF Read Array Places the device in Read Array mode. Array data is output on DQ[15:0]. 0x70 Read Status Register Places the device in Read Status Register mode. The device enters this mode after a program or erase command is issued. SR data is output on DQ[7:0]. 0x90 Read Device ID or Configuration Register Places device in Read Device Identifier mode. Subsequent reads output manufacturer/device codes, Configuration Register data, Block Lock status, or OTP Register data on DQ[15:0]. 0x98 Read Query Places the device in Read Query mode. Subsequent reads output Common Flash Interface information on DQ[7:0]. 0x50 Clear Status Register The WSM can only set SR error bits. The Clear Status Register command is used to clear the SR error bits. |
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