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LM3915 Datasheet(PDF) 3 Page - Texas Instruments

Part No. LM3915
Description  LM3915 Dot/Bar Display Driver
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

LM3915 Datasheet(HTML) 3 Page - Texas Instruments

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LM3915
www.ti.com
SNVS740C – JANUARY 2000 – REVISED MARCH 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
(1) (2)
Power Dissipation (3)
PDIP (NFK)
1365 mW
Supply Voltage
25V
Voltage on Output Drivers
25V
Input Signal Overvoltage (4)
±35V
Divider Voltage
−100 mV to V+
Reference Load Current
10 mA
Storage Temperature Range
−55°C to +150°C
Lead Temperature
(Soldering, 10 sec.)
260°C
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electrical
specifications under particular test conditions which ensure specific performance limits. This assumes that the device is within the
Operating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indication
of device performance.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3)
The maximum junction temperature of the LM3915 is 100°C. Devices must be derated for operation at elevated temperatures. Junction
to ambient thermal resistance is 55°C/W for the PDIP (NFK package).
(4)
Pin 5 input current must be limited to ±3 mA. The addition of a 39k resistor in series with pin 5 allows ±100V signals without damage.
ELECTRICAL CHARACTERISTICS
(1) (2)
Parameter
Conditions(1)
Min
Typ
Max
Units
COMPARATOR
Offset Voltage, Buffer and First
0V
≤ VRLO = VRHI ≤ 12V,
3
10
mV
Comparator
ILED = 1 mA
Offset Voltage, Buffer and Any Other
0V
≤ VRLO = VRHI ≤ 12V,
3
15
mV
Comparator
ILED = 1 mA
Gain (
ΔILED/ΔVIN)
IL(REF) = 2 mA, ILED = 10 mA
3
8
mA/mV
Input Bias Current (at Pin 5)
0V
≤ VIN ≤ (V
+ − 1.5V)
25
100
nA
Input Signal Overvoltage
No Change in Display
−35
35
V
VOLTAGE-DIVIDER
Divider Resistance
Total, Pin 6 to 4
16
28
36
k
Ω
Relative Accuracy (Input Change Between Any
(3)
2.0
3.0
4.0
dB
Two Threshold Points)
Absolute Accuracy at Each Threshold Point
(3)
VIN = −3, −6 dB
−0.5
+0.5
dB
VIN = −9 dB
−0.5
+0.65
dB
VIN = −12, −15, −18 dB
−0.5
+1.0
dB
VIH = −21, −24, −27 dB
−0.5
+1.5
dB
(1)
Unless otherwise stated, all specifications apply with the following conditions:
3 VDC ≤ V
+ ≤ 20 V
DC
−0.015V ≤ VRLO ≤ 12 VDC
TA = 25°C, IL(REF) = 0.2 mA, pin 9 connected to pin 3 (bar mode).
3 VDC ≤ VLED ≤ V
+
VREF, VRHI, VRLO ≤ (V
+ − 1.5V)
For higher power dissipations, pulse testing is used.
−0.015V ≤ VRHI ≤ 12 VDC
0V
≤ VIN ≤ V
+ − 1.5V
(2)
Pin 5 input current must be limited to ±3 mA. The addition of a 39k resistor in series with pin 5 allows ±100V signals without damage.
(3)
Accuracy is measured referred to 0 dB = + 10.000 VDC at pin 5, with + 10.000 VDC at pin 6, and 0.000 VDC at pin 4. At lower full scale
voltages, buffer and comparator offset voltage may add significant error. See Threshold Voltage.
Copyright © 2000–2013, Texas Instruments Incorporated
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