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74HCT4067D Datasheet(PDF) 15 Page - NXP Semiconductors |
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74HCT4067D Datasheet(HTML) 15 Page - NXP Semiconductors |
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74HC_HCT4067 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 13 December 2011 15 of 30 NXP Semiconductors 74HC4067; 74HCT4067 16-channel analog multiplexer/demultiplexer [1] tpd is the same as tPHL and tPLH. [2] Due to higher Z terminal capacitance (16 switches versus 1) the delay figures to the Z terminal are higher than those to the Y terminal. [3] ton is the same as tPHZ and tPLZ. [4] toff is the same as tPZH and tPZL. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi + {(CL +Csw) VCC2 fo} where: fi = input frequency in MHz; fo = output frequency in MHz; {(C L +Csw) VCC 2 f o} = sum of outputs; CL = output load capacitance in pF; Csw = switch capacitance in pF; VCC = supply voltage in V. ton turn-on time E to Yn; see Figure 13 [4] VCC = 2.0 V 80 275 345 415 ns VCC = 4.5 V 29 55 69 83 ns VCC = 5.0 V; CL = 15 pF 26 - - - ns VCC = 6.0 V 23 47 59 71 ns VCC = 9.0 V 17 42 53 63 ns Sn to Yn VCC = 2.0 V 88 300 375 450 ns VCC = 4.5 V 32 60 75 90 ns VCC = 5.0 V; CL = 15 pF 29 - - - ns VCC = 6.0 V 26 51 64 77 ns VCC = 9.0 V 18 45 56 68 ns E to Z VCC = 2.0 V 85 275 345 415 ns VCC = 4.5 V 31 55 69 83 ns VCC = 6.0 V 25 47 59 71 ns VCC = 9.0 V 18 42 53 63 ns Sn to Z VCC = 2.0 V 94 300 375 450 ns VCC = 4.5 V 34 60 75 90 ns VCC = 6.0 V 27 51 64 77 ns VCC = 9.0 V 19 45 56 68 ns CPD power dissipation capacitance per switch; VI = GND to VCC [5] 29 - - - pF Table 9. Dynamic characteristics 74HC4067 …continued GND = 0 V; tr = tf = 6 ns; CL = 50 pF unless specified otherwise; for test circuit see Figure 14. Vis is the input voltage at a Yn or Z terminal, whichever is assigned as an input. Vos is the output voltage at a Yn or Z terminal, whichever is assigned as an output. Symbol Parameter Conditions 25 C 40 C to +125 C Unit Typ Max Max (85 C) Max (125 C) |
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