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STM32F407VE Datasheet(PDF) 91 Page - STMicroelectronics |
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STM32F407VE Datasheet(HTML) 91 Page - STMicroelectronics |
91 / 167 page STM32F405xx, STM32F407xx Electrical characteristics Doc ID 022152 Rev 2 91/167 IDD(PLLI2S) (5) PLLI2S power consumption on VDD VCO freq = 192 MHz VCO freq = 432 MHz 0.15 0.45 - 0.40 0.75 mA IDDA(PLLI2S) (5) PLLI2S power consumption on VDDA VCO freq = 192 MHz VCO freq = 432 MHz 0.30 0.55 - 0.40 0.85 mA 1. TBD stands for “to be defined”. 2. Take care of using the appropriate division factor M to have the specified PLL input clock values. 3. Guaranteed by design, not tested in production. 4. Value given with main PLL running. 5. Based on characterization, not tested in production. Table 33. PLLI2S (audio PLL) characteristics(1) (continued) Symbol Parameter Conditions Min Typ Max Unit |
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