SN74LVTR245

3.3V ABT OCTAL TRANSCEIVER

WITH 3STATE OUTPUTS

SCAS428A – OCTOBER 1993 – REVISED NOVEMBER 2002

1

POST OFFICE BOX 655303

(5-V Input and Output Voltages With

Down to 2.7 V

Need for External Pullup/Pulldown

Resistors

JESD 17

description/ordering information

to provide a TTL interface to a 5-V system environment.

The SN74LVTR245 is designed for asynchronous communication between data buses. The device transmits

data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the

direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are

effectively isolated.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

The A port is designed to minimize the undershoot exhibited on high-to-low transitions during simultaneous

switching conditions.

ORDERING INFORMATION

TA

PACKAGE†

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

–40

°C to 85°C

SOP – NS

Tape and reel

SN74LVTR245NSR

LVTR245

† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Copyright

 2002, Texas Instruments Incorporated

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

DIR

A1

A2

A3

A4

A5

A6

A7

A8

GND

OE

B1

B2

B3

B4

B5

B6

B7

B8

NS PACKAGE

(TOP VIEW)

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.