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A8351601L-40 Datasheet(PDF) 33 Page - AMIC Technology |
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A8351601L-40 Datasheet(HTML) 33 Page - AMIC Technology |
33 / 44 page ![]() A8351601 Series (July, 2002, Version 1.0) 32 AMIC Technology, Inc. Power-on Reset An automatic reset can be obtained when VCC goes through a 1 0µF capacitor and GND through an 8.2K resistor, providing the VCC rise time does not exceed 1 msec and the oscillator start-up time does not exceed 10 msec. This power-on reset circuit is shown in Figure 15. The CMOS devices do not require the 8.2K pulldown resistor, although its presence does no harm. When power is turned on, the circuit holds the RST pin high for an amount of time that depends on the value of the capacitor and the rate at which it charges. To ensure a good reset, the RST pin must be high long enough to allow the oscillator time to start-up (normally a few msec) plus two machine cycles. Note that the port pins will be in a random state until the oscillator has start and the internal reset algorithm has written 1s to them. With this circuit, reducing VCC quickly to 0 causes the RST pin voltage to momentarily fall below 0V. However, this voltage is internally limited, and will not harm the device. VCC GND RST VCC 10uF + A8351601 Ω 8.2K Figure 15. Power-on Reset Circuit S5 S6 S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 12 OSC. PERIODS ADDR INST ADDR INST ADDR INST ADDR INST ADDR INST 11 OSC. PERIODS 19 OSC. PERIODS SAMPLE RST SAMPLE RST INTERNAL RESET SIGNAL Figure 16. Reset Timing RST ALE PSEN P0 |
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