A62S9308G-70S datasheet(11/17 Pages) AMICC

Part #	A62S9308G-70S

Description	512K X 8 BIT LOW VOLTAGE CMOS SRAM

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Manufacturer	AMICC [AMIC Technology]

Direct Link	http://www.amictechnology.com

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A62S9308 Series

PRELIMINARY

(February, 2001, Version 0.0)

10

AMIC Technology, Inc.

AC Test Conditions

Input Pulse Levels

0V to 3.0V

Input Rise and Fall Time

5 ns

Input and Output Timing Reference Levels

1.5V

Output Load

See Figures 1 and 2

30pF

* Including scope and jig.

CL

TTL

5pF

CL

TTL

Figure 1. Output Load

Figure 2. Output Load for tCLZ1,

tCLZ2, tOHZ, tOLZ, tCHZ1,

tCHZ2, tWHZ, and tOW

Data Retention Characteristics

(TA = 0

°C to + 70°C or -25°C to 85°C)

Symbol

Parameter

Min.

Max.

Unit

Conditions

VDR1

2.0

3.6

V

CE1

≥ VCC - 0.2V

VDR2

VCC for Data Retention

2.0

3.6

V

CE2

≤ 0.2V

CE1

≥ VCC - 0.2V or

CE1

≤ 0.2V

ICCDR1

S-Version

-

5*

µA

VCC = 2.0V

CE1

≥ VCC - 0.2V

Data Retention Current

SI-Version

-

10**

CE2

≥ VCC - 0.2V

VIN

≥ 0V

ICCDR2

S-Version

-

5*

µA

VCC = 2.0V

CE2

≤ 0.2V

SI-Version

-

10**

VIN

≥ 0V

tCDR

Chip Disable to Data Retention Time

0

-

ns

tR

Operation Recovery Time

tRC

-

ns

See Retention Waveform

* A62S9308-70S

ICCDR: Max. 1

µA at TA = 0°C + 40°C

** A62S9308-70SI

ICCDR: Max. 1

µA at TA = 0°C + 40°C

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A62S9308G-70S Datasheet(PDF) 11 Page - AMIC Technology

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