A62S7308BV-55SI datasheet(11/17 Pages) AMICC

Part #	A62S7308BV-55SI

Description	128K X 8 BIT LOW VOLTAGE CMOS SRAM

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Manufacturer	AMICC [AMIC Technology]

Direct Link	http://www.amictechnology.com

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11 / 17 page

A62S7308B Series

PRELIMINARY

(March, 2001, Version 0.2)

10

AMIC Technology, Inc.

{

AC Test Conditions

Input Pulse Levels

0V to 3V

Input Rise and Fall Time

5 ns

Input and Output Timing Reference Levels

1.5V

Output Load

See Figures 1 and 2

30pF

* Including scope and jig.

CL

TTL

5pF

CL

TTL

Figure 1. Output Load

Figure 2. Output Load for tCLZ1,

tCLZ2, tOHZ, tOLZ, tCHZ1,

tCHZ2, tWHZ, and tOW

Data Retention Characteristics

(TA = 0

°C to + 70°C or -25°C to 85°C)

Symbol

Parameter

Min.

Max.

Unit

Conditions

VDR

VCC for Data Retention

2.0

3.6

V

CE2

≤ 0.2V,

or

CE1

≥ VCC - 0.2V,

CE2

≥ VCC - 0.2V

ICCDR

Data Retention Current

S-Version

-

2*

µA

SI-Version

-

5**

VCC = 2.0V, CE2

≤ 0.2V,

or

CE1

≥ VCC - 0.2V

CE2

≥ VCC - 0.2V

tCDR

Chip Disable to Data Retention Time

0

-

ns

tR

Operation Recovery Time

tRC

-

ns

See Retention Waveform

* A62S7308B-55S/70S ICCDR: Max. 1

µA at TA = 0°C to + 40°C

** A62S7308B-55SI/70SI ICCDR: Max. 1

µA at TA = 0°C to + 40°C

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A62S7308BV-55SI Datasheet(PDF) 11 Page - AMIC Technology

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