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NCV7342D13R2G Datasheet(PDF) 7 Page - ON Semiconductor |
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NCV7342D13R2G Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 15 page NCV7342 http://onsemi.com 7 Over−temperature Detection A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 180 °C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC is reduced. All other IC functions continue to operate. The transmitter off−state resets when the temperature decreases below the shutdown threshold and pin TxD goes High. The thermal protection circuit is particularly needed in case of a bus line failure. TxD Dominant Time−out Function A TxD dominant time−out timer circuit prevents the bus lines being driven to a permanent dominant state (blocking all network communication), if pin TxD is forced permanently Low by a hardware and/or software application failure. The timer is triggered by a negative edge on pin TxD. If the duration of the low−level on pin TxD exceeds the internal timer value tdom(TxD), the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on pin TxD. This TxD dominant time−out time (tdom(TxD)) limits the minimum possible bit rate to 8 kbps. Bus Dominant Time−out Function Bus dominant time−out timer is started in the standby mode when CAN bus changes from recessive to dominant state. If the dominant state on the bus is kept for longer time than tdom(bus), the RxD pin is released to High level. The timer is reset when CAN bus changes from dominant to recessive state. This feature prevents generating permanent wake−up request by the bus clamped to the dominant level. Fail Safe Features A current−limiting circuit protects the transmitter output stage from damage caused by an accidental short circuit to either positive or negative supply voltage, although power dissipation increases during this fault condition. VCC supply dropping below VUVDVCC undervoltage level will force transceiver to switch into the standby mode. The logic level on pin STB will be ignored as long as undervoltage condition is not recovered. (NCV7342−3 version only) VIO supply dropping below VUVDVIO undervoltage detection level will cause the transceiver to disengage from the bus (no bus loading) until the VIO voltage recovers. (NCV7342−3 version only) The pins CANH and CANL are protected against automotive electrical transients (according to ISO 7637; see Figure 6). Pins TxD and STB are pulled High internally should the input become disconnected. Pins TxD, STB and RxD will be floating, preventing reverse supply should the VCC supply be removed. |
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