A23L9308 Series

Preliminary

524,288 X 8 BIT CMOS MASK ROM

PRELIMINARY

(October, 2001, Version 0.0)

1

AMIC Technology, Inc.

Features

n 524,288 x 8 bit organization

n Wide power supply range: +2.7V to +3.6V

n Access time: 150ns (max.)/3V~3.6V

200ns (max.)/2.7V~3.3V

n Current: Operating: 15mA (max.)/3V~3.6V

10mA (max.)/2.7V~3.3V

Standby:

25ìA (max.)/3V~3.6V

5ìA (max.)/2.7V~3.3V

n Mask Programmed for Chip Enable (power-down)

CE/ CE , Output Enable OE/ OE /NC

n Three-state outputs for wired-OR expansion

n Full static operation

n All inputs and outputs are directly TTL-compatible

n Available in 32-pin DIP, 32-pin SOP, 32-pin PLCC

packages or in DICE FORM.

General Description

The A23L9308 high-performance Read Only Memory is

configured as 524,288 x 8 bits. It is designed to be

compatible

with

all

microprocessors

and

similar

applications where high-performance, large-bit storage,

and

simple

interfacing

are

important

design

considerations. This device is designed for use with

operating voltage from 2.7V to 3.6V.

The A23L9308 offers an automatic POWER-DOWN

controlled by the Chip Enable CE/ CE input. When

CE/ CE goes low/high, the device will automatically

POWER-DOWN and remain in a low power STANDBY

mode as long as CE/ CE remains low/high. A23L9308

also offers OE/ OE /NC (Active High or Low or No

Connection), which eliminates bus contention in multiple

bus microprocessor systems.

Pin Configurations

n

n P-DIP / SOP

n

n PLCC

A23L9308

A6

A10

A9

NC

A16

A15

A12

A7

A6

A5

A4

A3

A2

O0

O1

O3

O4

O5

A11

A9

A13

VCC

A10

1

2

3

4

5

6

7

8

9

10

11

12

13

14

19

20

21

22

23

24

25

26

27

28

29

30

31

32

A8

O2

GND

O6

O7

CE/CE

A14

A5

A4

A3

A2

A1

A0

O0

O7

A8

A13

A14

5

6

7

8

9

10

11

12

13

21

22

23

24

25

26

27

28

29

OE/OE/NC

18

15

16

17

A1

A0

A18

A17

CE/CE

A11

A7

OE/OE/NC