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ADSP-2185NKSTZ-320 Datasheet(PDF) 37 Page - Analog Devices |
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ADSP-2185NKSTZ-320 Datasheet(HTML) 37 Page - Analog Devices |
37 / 48 page ADSP-218xN Rev. A | Page 37 of 48 | August 2006 IDMA Read, Long Read Cycle Table 24. IDMA Read, Long Read Cycle Parameter Min Max Unit Timing Requirements: tIKR IACK Low Before Start of Read1 0ns tIRK End of read After IACK Low2 2ns Switching Characteristics: tIKHR IACK High After Start of Read 1 10 ns tIKDS IAD15 – 0 Data Setup Before IACK Low 0.5tCK – 3 ns tIKDH IAD15 – 0 Data Hold After End of Read 2 0ns tIKDD IAD15 – 0 Data Disabled After End of Read2 10 ns tIRDE IAD15 – 0 Previous Data Enabled After Start of Read 0 ns tIRDV IAD15 – 0 Previous Data Valid After Start of Read 11 ns tIRDH1 IAD15 – 0 Previous Data Hold After Start of Read (DM/PM1) 3 2tCK – 5 ns tIRDH2 IAD15 – 0 Previous Data Hold After Start of Read (PM2) 4 tCK – 5 ns 1 Start of Read = IS Low and IRD Low. 2 End of Read = IS High or IRD High. 3 DM read or first half of PM read. 4 Second half of PM read. Figure 35. IDMA Read, Long Read Cycle tIRK tIKR PREVIOUS DATA READ DATA tIKHR tIKDS tIRDV tIKDD tIRDE tIKDH IAD15–0 IACK IS IRD tIRDH1 OR tIRDH2 |
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