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74LVCH8T245PW Datasheet(PDF) 10 Page - NXP Semiconductors

Part # 74LVCH8T245PW
Description  8-bit dual supply translating transceiver; 3-state
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

74LVCH8T245PW Datasheet(HTML) 10 Page - NXP Semiconductors

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74LVC_LVCH8T245
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 3 — 12 December 2011
10 of 28
NXP Semiconductors
74LVC8T245; 74LVCH8T245
8-bit dual supply translating transceiver; 3-state
10. Dynamic characteristics
[1]
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
[1]
tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH.
[1]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD  VCC2  fi  N+ (CL  VCC2  fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(C
L  VCC
2
 f
o) = sum of the outputs.
[2]
fi = 10 MHz; VI =GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL =  .
Table 8.
Typical dynamic characteristics at VCC(A) = 1.2 V and Tamb = 25 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6.
Symbol Parameter
Conditions
VCC(B)
Unit
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
5.0 V
tpd
propagation delay
An to Bn
11.0
8.5
7.4
6.2
5.7
5.4
ns
Bn to An
11.0
10.0
9.5
9.1
8.9
8.9
ns
tdis
disable time
OE to An
9.5
9.5
9.5
9.5
9.5
9.5
ns
OE to Bn
10.2
8.2
7.8
6.7
7.3
6.4
ns
ten
enable time
OE to An
13.5
13.5
13.5
13.5
13.5
13.5
ns
OE to Bn
13.6
10.3
8.9
7.5
7.1
7.0
ns
Table 9.
Typical dynamic characteristics at VCC(B) = 1.2 V and Tamb = 25 C[1]
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7; for waveforms see Figure 5 and Figure 6.
Symbol Parameter
Conditions
VCC(A)
Unit
1.2 V
1.5 V
1.8 V
2.5 V
3.3 V
5.0 V
tpd
propagation delay
An to Bn
11.0
10.0
9.5
9.1
8.9
8.8
ns
Bn to An
11.0
8.5
7.3
6.2
5.7
5.4
ns
tdis
disable time
OE to An
9.5
6.8
5.4
3.8
4.1
3.1
ns
OE to Bn
10.2
9.1
8.6
8.1
7.8
7.8
ns
ten
enable time
OE to An
13.5
9.0
6.9
4.8
3.8
3.2
ns
OE to Bn
13.6
12.5
12.0
11.5
11.4
11.4
ns
Table 10.
Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 C[1][2]
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
VCC(A) and VCC(B)
Unit
1.8 V
2.5 V
3.3 V
5.0 V
CPD
power dissipation
capacitance
A port: (direction A to B);
B port: (direction B to A)
11
12
pF
A port: (direction B to A);
B port: (direction A to B)
13
13
13
13
pF


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