11

8008HS–AVR–04/11

ATtiny48/88

Note:

1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses

should never be written.

2. I/O Registers within the address range 0x00

registers, the value of single bits can be checked by using the SBIS and SBIC instructions.

3. Some of the Status Flags are cleared by writing a logical one to them. Note that, unlike most other AVRs, the CBI and SBI

instructions will only operate on the specified bit, and can therefore be used on registers containing such Status Flags. The

CBI and SBI instructions work with registers 0x00 to 0x1F only.

4. When using the I/O specific commands IN and OUT, the I/O addresses 0x00

Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATtiny48/88 is a com-

plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN

and OUT instructions. For the Extended I/O space from 0x60

instructions can be used.

0x1A (0x3A)

Reserved

–

–

–

–

–

–

–

–

0x19 (0x39)

Reserved

–

–

–

–

–

–

–

–

0x18 (0x38)

Reserved

–

–

–

–

–

–

–

–

0x17 (0x37)

Reserved

–

–

–

–

–

–

–

–

0x16 (0x36)

TIFR1

–

–ICF1

–

–

OCF1B

OCF1A

TOV1

115

0x15 (0x35)

TIFR0

–

–

–

–

–

OCF0B

OCF0A

TOV0

87

0x14 (0x34)

Reserved

–

–

–

–

–

–

–

–

0x13 (0x33)

Reserved

–

–

–

–

–

–

–

–

0x12 (0x32)

PORTCR

BBMD

BBMC

BBMB

BBMA

PUDD

PUDC

PUDB

PUDA

77

0x11 (0x31)

Reserved

–

–

–

–

–

–

–

–

0x10 (0x30)

Reserved

–

–

–

–

–

–

–

–

0x0F (0x2F)

Reserved

–

–

–

–

–

–

–

–

0x0E (0x2E)

PORTA

–

–

–

–

PORTA3

PORTA2

PORTA1

PORTA0

78

0x0D (0x2D)

DDRA

–

–

–

–

DDA3

DDA2

DDA1

DDA0

78

0x0C (0x2C)

PINA

–

–

–

–

PINA3

PINA2

PINA1

PINA0

78

0x0B (0x2B)

PORTD

PORTD7

PORTD6

PORTD5

PORTD4

PORTD3

PORTD2

PORTD1

PORTD0

79

0x0A (0x2A)

DDRD

DDD7

DDD6

DDD5

DDD4

DDD3

DDD2

DDD1

DDD0

79

0x09 (0x29)

PIND

PIND7

PIND6

PIND5

PIND4

PIND3

PIND2

PIND1

PIND0

79

0x08 (0x28)

PORTC

PORTC7

PORTC6

PORTC5

PORTC4

PORTC3

PORTC2

PORTC1

PORTC0

78

0x07 (0x27)

DDRC

DDC7

DDC6

DDC5

DDC4

DDC3

DDC2

DDC1

DDC0

78

0x06 (0x26)

PINC

PINC7

PINC6

PINC5

PINC4

PINC3

PINC2

PINC1

PINC0

79

0x05 (0x25)

PORTB

PORTB7

PORTB6

PORTB5

PORTB4

PORTB3

PORTB2

PORTB1

PORTB0

78

0x04 (0x24)

DDRB

DDB7

DDB6

DDB5

DDB4

DDB3

DDB2

DDB1

DDB0

78

0x03 (0x23)

PINB

PINB7

PINB6

PINB5

PINB4

PINB3

PINB2

PINB1

PINB0

78

0x02 (0x22)

Reserved

–

–

–

–

–

–

–

–

0x01 (0x21)

Reserved

–

–

–

–

–

–

–

–

0x00 (0x20)

Reserved

–

–

–

–

–

–

–

–

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

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