Electronic Components Datasheet Search |
|
ATTINY48-PU Datasheet(PDF) 4 Page - ATMEL Corporation |
|
ATTINY48-PU Datasheet(HTML) 4 Page - ATMEL Corporation |
4 / 26 page 4 8008HS–AVR–04/11 ATtiny48/88 minimum pulse length is given in Table 22-3 on page 209. Shorter pulses are not guaranteed to generate a reset. The various special features of Port C are elaborated in “Alternate Functions of Port C” on page 72. 1.1.8 Port D (PD7:0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PD[7:4] output buffers have symmetrical drive characteristics with both sink and source capabil- ities, while the PD[3:0] output buffers have high sink capabilities. As inputs, Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. The various special features of Port D are elaborated in “Alternate Functions of Port D” on page 75. |
Similar Part No. - ATTINY48-PU |
|
Similar Description - ATTINY48-PU |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |