AD9851 datasheet(9/24 Pages) AD

Part #	AD9851

Description	CMOS 180 MHz DDS/DAC Synthesizer

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AD9851

–9–

MAXIMUM DAC IOUT – mA

40

5

10

15

20

45

50

55

60

65

70

1.1MHz

40.1MHz

70.1MHz

TPC 17. Effect of DAC maximum output current on

wideband (0 to 72 MHz) SFDR at three representa-

tive DAC output frequencies: 1.1 MHz, 40.1 MHz,

and 70.1 MHz. VS

and 70.1 MHz. V

and 70.1 MHz. V = 5 V, 180 MHz system clock (6

S



REFCLK multiplier disabled). Currents are set using

appropriate values of RSET.

SET

INPUT FREQUENCY – MHz

0

20

40

60

80

100

120

140

160

100

200

300

400

500

600

VS = +3.3V

VS = +5V

TPC 18. Minimum p-p input signal needed to tog-

gle the AD9851 comparator output. Comparator

input is a sine wave compared with a fixed volt-

age threshold. Use this data in addition to sin(x)/x

rolloff and any filter losses to determine whether

adequate signal is being presented to the AD9851

comparator.

REV. D

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