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EVAL-AD7859CB4 Datasheet(PDF) 19 Page - Analog Devices |
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EVAL-AD7859CB4 Datasheet(HTML) 19 Page - Analog Devices |
19 / 28 page AD7859/AD7859L REV. A –19– POWER VS. THROUGHPUT RATE The main advantage of a full power-down after a conversion is that it significantly reduces the power consumption of the part at lower throughput rates. When using this mode of operation, the AD7859/AD7859L is only powered up for the duration of the conversion. If the power-up time of the AD7859/AD7859L is taken to be 5 µs and it is assumed that the current during power up is 4.5 mA/1.5 mA typ, then power consumption as a function of throughput can easily be calculated. The AD7859 has a conversion time of 4.6 µs with a 4 MHz external clock and the AD7859L has a conversion time of 9 µs with a 1.8 MHz clock. This means the AD7859/AD7859L consumes 4.5 mA/ 1.5 mA typ for 9.6 µs/14 µs in every conversion cycle if the parts are powered down at the end of a conversion. The two graphs, Figure 24 and Figure 25, show the power consumption of the AD7859 and AD7859L for VDD = 3 V as a function of through- put. Table VIII lists the power consumption for various throughput rates. Table VIII. Power Consumption vs. Throughput Power Power Throughput Rate AD7859 AD7859L 1 kSPS 130 µW65 µW 10 kSPS 1.3 mW 650 µW 20 kSPS 2.6 mW 1.25 mW 50 kSPS 6.48 mW 3.2 mW 1.8MHz OSCILLATOR AVDD DVDD AIN(+) AIN(–) CREF1 CREF2 SLEEP DB15 DB0 CONVST AGND DGND CLKIN REFIN/REFOUT AD7859L ANALOG SUPPLY +3V 0.1µF 0.1µF 10µF 0.1µF 0.01µF CONVERSION START SIGNAL 0.1µF CAL 0V TO 2.5V INPUT OPTIONAL EXTERNAL REFERENCE CS RD WR W/B BUSY DVDD REF192 CURRENT, I = 1.5mA TYP LOW POWER µC/µP Figure 23. Typical Low Power Circuit CONVST BUSY 5µs 4.6µs tCONVERT START CONVERSION ON RISING EDGE POWER UP ON FALLING EDGE POWER-UP TIME NORMAL OPERATION FULL POWER-DOWN POWER-UP TIME Figure 21. Using the CONVST Pin to Power Up the AD7859 for a Conversion Using The Internal (On-Chip) Reference As in the case of an external reference, the AD7859/AD7859L can power up from one of two conditions, power-up after the supplies are connected or power-up from hardware/software power-down. When using the on-chip reference and powering up when AVDD and DVDD are first connected, it is recommended that the power-up calibration mode be disabled as explained above. When using the on-chip reference, the power-up time is effec- tively the time it takes to charge up the external capacitor on the REFIN/REFOUT pin. This time is given by the equation: tUP = 9 × R × C where R ≈ 150K and C = external capacitor. The recommended value of the external capacitor is 100 nF; this gives a power-up time of approximately 135 ms before a calibration is initiated and normal operation should commence. When CREF is fully charged, the power-up time from a hardware or software power-down reduces to 5 µs. This is because an in- ternal switch opens to provide a high impedance discharge path for the reference capacitor during power-down—see Figure 22. An added advantage of the low charge leakage from the refer- ence capacitor during power-down is that even though the refer- ence is being powered down between conversions, the reference capacitor holds the reference voltage to within 0.5 LSBs with throughput rates of 100 samples/second and over with a full power-down between conversions. A high input impedance op amp like the AD707 should be used to buffer this reference capacitor if it is being used externally. Note, if the AD7859/ AD7859L is left in its powered-down state for more than 100 ms, the charge on CREF will start to leak away and the power-up time will increase. If this long power-up time is a problem, the user can use a partial power-down for the last con- version so the reference remains powered up. BUF ON-CHIP REFERENCE TO OTHER CIRCUITRY SWITCH OPENS DURING POWER-DOWN REFIN/OUT EXTERNAL CAPACITOR Figure 22. On-Chip Reference During Power-Down |
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