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APA075 Datasheet(PDF) 48 Page - Microsemi Corporation |
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APA075 Datasheet(HTML) 48 Page - Microsemi Corporation |
48 / 174 page ProASICPLUS Flash Family FPGAs 1- 44 v5.2 Output Buffer Delays Figure 1-27 • Output Buffer Delays Table 1-29 • Worst-Case Commercial Conditions VDDP = 3.0 V, VDD = 2.3 V, 35 pF load, TJ = 70°C Macro Type Description Max tDLH 1 Max tDHL 2 Units Std. –F Std. –F OB33PH 3.3 V, PCI Output Current, High Slew Rate 2.0 2.4 2.2 2.6 ns OB33PN 3.3 V, High Output Current, Nominal Slew Rate 2.2 2.6 2.9 3.5 ns OB33PL 3.3 V, High Output Current, Low Slew Rate 2.5 3.0 3.2 3.9 ns OB33LH 3.3 V, Low Output Current, High Slew Rate 2.6 3.1 4.0 4.8 ns OB33LN 3.3 V, Low Output Current, Nominal Slew Rate 2.9 3.5 4.3 5.2 ns OB33LL 3.3 V, Low Output Current, Low Slew Rate 3.0 3.6 5.6 6.7 ns Notes: 1. tDLH = Data-to-Pad High 2. tDHL = Data-to-Pad Low 3. All –F parts are only available as commercial. Table 1-30 • Worst-Case Commercial Conditions VDDP = 2.3 V, VDD = 2.3 V, 35 pF load, TJ = 70°C Macro Type Description Max tDLH 1 Max tDHL 2 Units Std. –F Std. –F OB25LPHH 2.5 V, Low Power, High Output Current, High Slew Rate3 2.0 2.4 2.1 2.6 ns OB25LPHN 2.5 V, Low Power, High Output Current, Nominal Slew Rate3 2.4 2.9 3.0 3.6 ns OB25LPHL 2.5 V, Low Power, High Output Current, Low Slew Rate3 2.9 3.5 3.2 3.8 ns OB25LPLH 2.5 V, Low Power, Low Output Current, High Slew Rate3 2.7 3.3 4.6 5.5 ns OB25LPLN 2.5 V, Low Power, Low Output Current, Nominal Slew Rate3 3.5 4.2 4.2 5.1 ns OB25LPLL 2.5 V, Low Power, Low Output Current, Low Slew Rate3 4.0 4.8 5.3 6.4 ns Notes: 1. tDLH = Data-to-Pad High 2. tDHL = Data-to-Pad Low 3. Low-power I/Os work with VDDP=2.5 V ±10% only. VDDP=2.3 V for delays. 4. All –F parts are only available as commercial. PAD A 50% PAD VOL V OH 50% t DLH 50% 50% t DHL 35pF A OBx |
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