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P1AFS15002 Datasheet(PDF) 20 Page - Microsemi Corporation

Part No. P1AFS15002
Description  Terrestrial FPGA and SoC Product Catalog
Download  27 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

P1AFS15002 Datasheet(HTML) 20 Page - Microsemi Corporation

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www.microsemi.com/soc
FPGA Design
FlashPro4, ULINK, J-LINK
Hardware Interfaces
MSS Configuration – Analog Configuration
MSS Configurator*
Design Entry and IP Libraries
Simulation and Synthesis
Compile and Layout
Timing and Power Analysis
Hardware Debug
Embedded Design
Software IDE
(SoftConsole, Keil, IAR)
Drivers and Sample Projects
Application Development
Build Project
Simulation
Software Debug
Design Environment for Microsemi Flash Devices
* MSS configurator is specific to the SmartFusion design flow.
Microsemi’s Libero® Integrated Design Environment (IDE) is a comprehensive
software toolset for designing with all Microsemi FPGAs. Libero IDE includes
industry-leading synthesis, simulation and debug tools from Synopsys®
and Mentor Graphics®, as well as innovative timing and power optimization
and analysis.
Microsemi’s SmartDesign tool simplifies the use of Microsemi IP in user
designs as well as offering a simple way to build on-chip processors with
custom peripherals. Most Microsemi IP cores are now included by default
in Libero IDE as either obfuscated or RTL versions, depending on the
license selected.
For embedded designers, Microsemi offers FREE SoftConsole Eclipse-based
IDE for use with ARM Cortex-M1, Cortex-M3 and Core8051s, as well as
evaluation versions from Keiland IAR Systems®. Full versions are available
from respective suppliers.
For SmartFusion cSoCs, the MSS configurator creates a bridge between
the FPGA fabric and embedded designs, so device configuration can be
easily shared among multiple developers. The MSS configurator allows
the designer to choose peripherals, assign configuration settings and
change I/O attributes. Most importantly, the memory map is automatically
generated according to the user’s selections, along with all the required
firmware for the selected configuration. The memory map and firmware are
imported into the software project, whether it is GNU, Keil or IAR.
FPGA Design Support
Embedded Design Support
Platform Support
Libero IDE Licenses
Gold(FREE)
Platinum
Platinum Evaluation
Standalone
Device Support
All families
Up to 1,500,000 gates
All devices
All devices
All devices
Microsemi IP
Obfuscated
RTL
Obfuscated
RTL
Synthesis
Synplify® Pro AE
x
x
x
Simulation
ModelSim® AE
x
x
x
Debug
Identify® AE
x
x
x
Microsemi Debug
x
x
x
x
Program File
x
x
x
Microsemi
Keil
IARSystems
SoftConsole
Keil MDK
EmbeddedWorkbench®
FreeVersionsfromMicrosemi
Free with Libero IDE
32 K Code Limited
32 K Code Limited
AvailablefromVendor
N/A
Full version
Full version
Compiler
GNU GCC
RealView® C/C++
IAR ARM Compiler
Debugger
GDB Debug
µVision Debugger
C-SPY® Debugger
Instruction Set Simulator
No
µVision Simulator
Yes
DebugHardware
FlashPro4
ULink®2 or ULINK-ME
J-Linkor J-Link Lite
Tool
Libero IDE
SoftConsole
Keil
IAR
FlashPro
Windows®XPProfessional
Now
Now
Now
Now
Now
WindowsVistaBusiness
andWindows7
Now
Now
Now
Now
Now
RedHatLinuxWS5.0,5.2
Now
N/A
N/A
N/A
N/A


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