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P1AFS15002 Datasheet(PDF) 8 Page - Microsemi Corporation

Part No. P1AFS15002
Description  Terrestrial FPGA and SoC Product Catalog
Download  27 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

P1AFS15002 Datasheet(HTML) 8 Page - Microsemi Corporation

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8 www.microsemi.com/soc
• UltralowpowerinFlash*Freeze
mode,aslowas2µW
• Varietyofsmallfootprint
packages as small as 3x3 mm
• Zerolead-timeonselecteddevices
• Knowngooddiesupported
• Enhancedcommercialtemperature
• Reprogrammableflashtechnology
• 1.2Vto1.5Vsingle
voltage operation
• EnhancedI/Ofeatures
• Clockconditioningcircuits(CCCs)
and PLLs
• EmbeddedSRAMand
nonvolatilememory(NVM)
• ISPandsecurity
IGLOO nano
IGLOO nano Devices
I/Os Per Package
IGLOO nano Devices
AGLN010
AGLN020
AGLN060
AGLN125
AGLN250
Known Good Die
34
52
71
71
68
UC36
23
QN48
34
QN68
49
UC81
52
CS81
52
60
60
60
VQ100
71
71
68
Theindustry’slowestpower,smallest-sizesolution
IGLOO nano products offer groundbreaking possibilities in power, size, lead-times, operating temperature and cost. Available in logic densities from 10,000 to
250,000 gates, the 1.2 V to 1.5 V IGLOO nano devices have been designed for high-volume applications where power and size are key decision criteria.
IGLOO nano devices are perfect ASIC or ASSP replacements, yet retain the historical FPGA advantages of flexibility and quick time-to-market in low power
and small footprint profiles.
Notes:
1. AGLN030 and smaller devices do not support this feature.
2. AGLN060, AGLN125, and AGLN250 in the CS81 package do not support PLLs.
3. For higher densities and support of additional features, refer to the IGLOO and IGLOOe datasheets and FPGA fabric user’s guides.
Note:
* When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not used as a regular I/O, the number of single-ended user I/Os available is reduced by one.
IGLOO nano Devices
AGLN010
AGLN020
AGLN060
AGLN125
AGLN250
System Gates
10,000
20,000
60,000
125,000
250,000
Typical Equivalent Macrocells
86
172
512
1,024
2,048
VersaTiles(D-flip-flops)
260
520
1,536
3,072
6,144
Flash*FreezeMode(typical,µW)
2
4
10
16
24
RAMKbits1(1,024bits)
18
36
36
4,608-BitBlocks1
4
8
8
FlashROMKbits(1,024bits)
1
1
1
1
1
AES-Protected ISP1
Yes
Yes
Yes
Integrated PLL in CCCs1,2
1
1
1
VersaNetGlobals
4
4
18
18
18
I/OBanks
2
3
2
2
4
Maximum User I/Os (packaged device)
34
52
71
71
68
Known Good Die User I/Os
34
52
71
71
68
Package Pins
UC
CS
QN
VQ
UC36
QN48
UC81
CS81
QN68
CS81
VQ100
CS81
VQ100
CS81
VQ100


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