LY65256

Rev. 1.1

32K X 8 BIT HIGH SPEED CMOS SRAM

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

4

®

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

SYM.

LY65256-20

UNIT

MIN.

MAX.

Read Cycle Time

20

-

ns

Address Access Time

-20

ns

Chip Enable Access Time

-20

ns

Output Enable Access Time

-8

ns

Chip Enable to Output in Low-Z

4

-

ns

Output Enable to Output in Low-Z

0

-

ns

Chip Disable to Output in High-Z

8

ns

Output Disable to Output in High-Z

8

ns

Output Hold from Address Change

3-

ns

(2) WRITE CYCLE

PARAMETER

SYM.

LY65256-20

UNIT

MIN.

MAX.

Write Cycle Time

20

-

ns

Address Valid to End of Write

16

-

ns

Chip Enable to End of Write

16

-

ns

Address Set-up Time

0-

ns

Write Pulse Width

11

-

ns

Write Recovery Time

0-

ns

Data to Write Time Overlap

9-

ns

Data Hold from End of Write Time

0-

ns

Output Active from End of Write

5

-

ns

Write to Output in High-Z

-

9

ns

*These parameters are guaranteed by device characterization, but not production tested.