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TS14001 Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers

Part No. TS14001
Description  nanoSmart® Ultra-Low-Power Linear Regulator
Download  13 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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TS14001 Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers

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TS14001
Version 1.4
Specifications subject to change
WWW.TRIUNESYSTEMS.COM
Copyright © 2012, Triune Systems, LLC
APPLICATION USING A MULTI-LAYER PCB
To maximize the efficiency of this package for application on a single layer or multi-layer PCB, certain guidelines must be
followed when laying out this part on the PCB.
The following are guidelines for mounting the exposed pad IC on a Multi-Layer PCB with ground a plane.
JEDEC standard FR4 PCB Cross-section:
Multi-Layer Board (Cross-sectional View)
In a multi-layer board application, the thermal vias are the primary method of heat transfer from the package thermal pad to
the internal ground plane. The efficiency of this method depends on several factors, including die area, number of thermal vias,
thickness of copper, etc.
Package Thermal Pad
Solder Pad (Land Pattern)
Thermal Via's
Package Outline
Package and PCB Land Configuration
For a Multi-Layer PCB
(square)
Package Solder Pad
Package Solder Pad
(bottom trace)
Thermal Via
Component Traces
Thermal Isolation
Power plane only
1.5748mm
0.0 - 0.071 mm Board Base
& Bottom Pad
0.5246 - 0.5606 mm
Power Plane
(1oz Cu)
1.0142 - 1.0502 mm
Ground Plane
(1oz Cu)
1.5038 - 1.5748 mm
Component Trace
(2oz Cu)
2 Plane
4 Plane


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