8-BIT ADDRESSABLE

DMOS POWER DRIVER

The A6B259KA and A6B259KLW combine a 3-to-8 line CMOS

decoder and accompanying data latches, control circuitry, and DMOS

outputs in a multi-functional power driver capable of storing single-line

data in the addressable latches or use as a decoder or demuliplexer.

Driver applications include relays, solenoids, and other medium-

current or high-voltage peripheral power loads.

The CMOS inputs and latches allow direct interfacing with micro-

processor-based systems. Use with TTL may require appropriate pull-

up resistors to ensure an input logic high. Four modes of operation are

selectable with the CLEAR and ENABLE inputs.

The A6B259KA/KLW DMOS open-drain outputs are capable of

able as the A6259KA/KLW.

The A6B259KA is furnished in a 20-pin dual in-line plastic

package. The A6B259KLW is furnished in a 20-lead wide-body,

small-outline plastic package (SOIC) with gull-wing leads for surface-

mount applications. Copper lead frames, reduced supply current

requirements, and low on-state resistance allow either device to sink

150 mA from all outputs continuously, to ambient temperatures greater

than 85

°C.

FEATURES

s 50 V Minimum Output Clamp Voltage

s 150 mA Output Current (all outputs simultaneously)

s 5

DS(on)

s Low Power Consumption

s Replacements for TPIC6B259N and TPIC6B259DW

6B259

ADVANCE INFORMATION

(Subject to change without notice)

January 24, 2000

Always order by complete part number:

Part Number

Package

A6B259KA

20-pin DIP

55

°C/W

25

°C/W

A6B259KLW

20-lead SOIC

70

°C/W

17

°C/W

LOGIC

GROUND

1

2

3

8

9

13

14

15

16

17

19

4

5

6

7

12

18

20

DATA

S

(LSB)

LOGIC

SUPPLY

POWER

GROUND

CLEAR

Dwg. PP-050-1

10

11

NO (INTERNAL)

CONNECTION

NO (INTERNAL)

CONNECTION

NC

NC

ENABLE

EN

POWER

GROUND

0

S

(MSB)

2

Note that the A6B259KA (DIP) and the A6B259KLW

(SOIC) are electrically identical and share a common

terminal number assignment.

ABSOLUTE MAXIMUM RATINGS

Output Drain Current,

Single-Pulse Avalanche Energy,

Input Voltage Range,

Package Power Dissipation,

Operating Temperature Range,

Storage Temperature Range,

* Each output, all outputs on.

† Pulse duration

≤ 100 µs, duty cycle ≤ 2%.

Caution: These CMOS devices have input static

protection (Class 3) but are still susceptible to damage if

exposed to extremely high static electrical charges.