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6811 Datasheet(PDF) 1 Page - Allegro MicroSystems

Part No. 6811
Description  DABiC-IV, 12-BIT SERIAL-INPUT, LATCHED SOURCE DRIVER
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Maker  ALLEGRO [Allegro MicroSystems]
Homepage  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

6811 Datasheet(HTML) 1 Page - Allegro MicroSystems

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DABiC-IV, 12-BIT SERIAL-INPUT,
LATCHED SOURCE DRIVER
A6811xA
ABSOLUTE MAXIMUM RATINGS
at TA = 25
°C
Logic Supply Voltage, VDD ................... 7.0 V
Driver Supply Voltage, VBB ................... 60 V
Continuous Output Current Range,
IOUT ......................... -40 mA to +15 mA
Input Voltage Range,
VIN ....................... -0.3 V to VDD + 0.3 V
Package Power Dissipation,
PD ........................................ See Graph
Operating Temperature Range, TA
(Suffix ‘E–’) .................. -40
°C to +85°C
(Suffix ‘S–’) .................. -20
°C to +85°C
Storage Temperature Range,
TS ............................... -55
°C to +125°C
Caution: These CMOS devices have input
static protection (Class 2) but are still
susceptible to damage if exposed to
extremely high static electrical charges.
The A6811– devices combine a 12-bit CMOS shift register,
accompanying data latches and control circuitry with bipolar sourcing
outputs and pnp active pull downs. Designed primarily to drive
vacuum-fluorescent displays, the 60 V and -40 mA output ratings also
allow these devices to be used in many other peripheral power driver
applications. The A6811– features an increased data input rate (com-
pared with the older UCN/UCQ5811A) and a controlled output slew
rate.
The CMOS shift register and latches allow direct interfacing with
microprocessor-based systems. With a 3.3 V or 5 V logic supply,
typical serial-data input rates are up to 33 MHz.
A CMOS serial data output permits cascade connections in applica-
tions requiring additional drive lines. Similar devices are available as
the A6809– and A6810– (10 bits), A6812– (20 bits), and A6818– (32
bits).
The A6811– output source drivers are npn Darlingtons, capable of
sourcing up to 40 mA. The controlled output slew rate reduces electro-
magnetic noise, which is an important consideration in systems that
include telecommunications and/or microprocessors and to meet
government emissions regulations. For inter-digit blanking, all output
drivers can be disabled and all sink drivers turned on with a BLANK-
ING input high. The pnp active pull-downs will sink at least 2.5 mA.
Two temperature ranges are available for optimum performance in
commercial (suffix S-) or industrial (suffix E-) applications. Package
styles are provided for through-hole DIP (suffix -A) and surface-mount
SOIC or PLCC (suffix -LW or -EP). Copper lead frames, low logic-
power dissipation, and low output-saturation voltages allow all devices
to source 25 mA from all outputs continuously at up to 83
°C.
FEATURES
I Controlled Output Slew Rate
I High-Speed Data Storage
I 60 V Minimum
Output Breakdown
I High Data Input Rate
I PNP Active Pull-Downs
I Low Output-Saturation Voltages
Complete part number includes a suffix to identify operating
temperature range (E- or S-) and package type (-A, -EP, or -LW).
Always order by complete part number, e.g., A6811SLW .
13
14
15
16
17
19
12
18
20
11
1
2
3
8
9
4
5
6
7
10
SERIAL
DATA OUT
SERIAL
DATA IN
BLANKING
LOGIC
SUPPLY
STROBE
CLOCK
OUT1
OUT2
OUT11
OUT 12
LOAD
SUPPLY
BB
V
VDD
ST
GROUND
CLK
BLNK
OUT 9
OUT 10
OUT 3
Dwg. PP-029-5
OUT 8
OUT7
OUT 6
OUT 5
OUT 4
6811
PRELIMINARY INFORMATION
(subject to change without notice)
May 15, 2000
I Low-Power CMOS Logic
and Latches
I Improved Replacements
for SN75512B, UCN5811–,
and UCQ5811–


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