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400FB Datasheet(PDF) 6 Page - Numonyx B.V

Part # 400FB
Description  Top / Bottom Boot Block 5 V Supply Flash Memory
Download  67 Pages
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

400FB Datasheet(HTML) 6 Page - Numonyx B.V

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Description
M29FxxxFT, M29FxxxFB
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Description
The following overview of the Numonyx® Axcell™ M29F 5 V Flash Memory device
(M29W160F) refers to the 16-Mbit device. However, the information can also apply to lower
densities of the M29F device.
The M29F160F is a 16 Mbit (2 Mbit x8 or 1 Mbit x16) non-volatile memory that can be read,
erased and reprogrammed. These operations can be performed using a single low voltage
(4.5 to 5.5 V) supply. On power-up the memory defaults to its Read mode where it can be
read in the same way as a ROM or EPROM.
The memory is divided into blocks that can be erased independently so it is possible to
preserve valid data while old data is erased. Each block can be protected independently to
prevent accidental Program or Erase commands from modifying the memory. Program and
Erase commands are written to the Command Interface of the memory. An on-chip
Program/Erase Controller simplifies the process of programming or erasing the memory by
taking care of all of the special operations that are required to update the memory contents.
The end of a program or erase operation can be detected and any error conditions
identified. The command set required to control the memory is consistent with JEDEC
standards.
The blocks in the memory are asymmetrically arranged, as shown in Figure 10.: Block
Addresses, M29F160 (x8) and Figure 11.: Block Addresses, M29F160 (x16). The first or last
64 KBytes have been divided into four additional blocks. The 16 KByte Boot Block can be
used for small initialization code to start the microprocessor, the two 8 KByte Parameter
Blocks can be used for parameter storage and the remaining 32K is a small Main Block
where the application may be stored.
Chip Enable, Output Enable and Write Enable signals control the bus operation of the
memory. They allow simple connection to most microprocessors, often without additional
logic.
The memory is offered in TSOP48 (12 x 20mm), SO44 , and TFBGA48 (0.8 mm pitch)
packages. The memory is supplied with all the bits erased (set to ’1’).


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