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3972 Datasheet(PDF) 4 Page - Allegro MicroSystems |
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3972 Datasheet(HTML) 4 Page - Allegro MicroSystems |
4 / 12 page 3972 DUAL DMOS FULL-BRIDGE MICROSTEPPING PWM MOTOR DRIVER 115 Northeast Cutoff, Box 15036 Worcester, Massachusetts 01615-0036 (508) 853-5000 4 ELECTRICAL CHARACTERISTICS at T A = +25°C, VBB = 50 V, VDD = 5.0 V, VS = 0.5 V, f PWM < 50 kHz (unless otherwise noted). Limits Characteristics Symbol Test Conditions Min. Typ. Max. Units Control Logic (continued) Internal Oscillator f OSC OSC shorted to ground 3.0 4.0 5.0 MHz R OSC = 51 kΩ 3.4 4.0 4.6 MHz DAC Accuracy (total error) E T Relative to DAC reference buffer — ±1/2 — LSB output, D0 = 0, D17 = 0 Reference Input Voltage Range V REF(EXT) 0.5 — 2.6 V Reference Buffer Offset V OS — ±10 — mV Reference Divider Ratio V REF/VS D0 = 0, D18 = 0 — 8.0 — — D0 = 0, D18 = 1 — 4.0 — — Reference Input Current I REF V REF = 2.0 V — — ±0.5 µA Internal Reference Voltage V REF(INT) 1.94 2.0 2.06 V Gain (G m) Error (note 3) E G D0 = 0, D17 = 0, D18 = 0, DAC = 63 — 0 ±6% D18 = 0, DAC = 31 — 0 ±9% D18 = 1, DAC = 63 — 0 ±6% D18 = 1, DAC = 15 — 0 ±10 % Comparator Input Offset Voltage V IO V REF = 0 V — ±5.0 — mV Propagation Delay Times t pd 50% to 90%: PWM change to source on 500 800 1200 ns PWM change to source off 50 150 350 ns PWM change to sink on 500 800 1200 ns PWM change to sink off 50 150 350 ns Crossover Dead Time t dt 300 700 900 ns Thermal Shutdown Temperature T J — 165 — °C Thermal Shutdown Hysteresis ∆T J —15 — °C UVLO Enable Threshold V UVLO Increasing V DD 3.9 4.2 4.45 V UVLO Hysteresis ∆V UVLO 0.05 0.10 — V NOTES: 1. Typical Data is for design information only. 2. Negative current is defined as coming out of (sourcing) the specified device terminal. 3. E G = [(VREF/Range) – VS]/(VREF/Range). |
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