DRV8332-HT

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SLES274B – AUGUST 2013 – REVISED JANUARY 2014

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

PACKAGE

ORDERABLE PART NUMBER

TOP-SIDE MARKING

–55°C to 175°C

DDV

DRV8332HDDV

DRV8332H

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

Over operating free-air temperature range unless otherwise noted

(1)

VALUE

VDD to GND

–0.3 V to 13.2 V

GVDD_X to GND

–0.3 V to 13.2 V

–0.3 V to 70 V

–0.3 V to 70 V

–0.3 V to 80 V

Maximum bootstrap in rush current, IBST_In

0.4 A

Transient peak output current (per pin), pulse width limited by internal over-current protection circuit.

16 A

Transient peak output current for latch shut down (per pin)

20 A

VREG to AGND

–0.3 V to 4.2 V

GND_X to GND

–0.3 V to 0.3 V

GND to AGND

–0.3 V to 0.3 V

PWM_X, RESET_X to GND

–0.3 V to 4.2 V

OC_ADJ, M1, M2, M3 to AGND

–0.3 V to 4.2 V

FAULT, OTW to GND

–0.3 V to 7 V

Maximum continuous sink current (FAULT, OTW)

9 mA

-55°C to 185°C

–55°C to 175°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

These voltages represent the dc voltage + peak ac waveform measured at the terminal of the device in all conditions.

RECOMMENDED OPERATING CONDITIONS

MIN

NOM

MAX

UNIT

PVDD_X

Half bridge X (A, B, or C) DC supply voltage

0

50

52.5

V

GVDD_X

Supply for logic regulators and gate-drive circuitry

10.8

12

13.2

V

VDD

Digital regulator supply voltage

10.8

12

13.2

V

Pulsed peak current per output pin (could be limited by thermal)

7

A

Continuous current per output pin (DRV8332)

5

A

PWM switching frequency

380

kHz

OC programming resistor range in cycle-by-cycle current limit modes

30

200

k

Ω

Bootstrap capacitor range

33

220

nF

Minimum PWM pulse duration, low side

50

ns

Operating junction temperature

-55

175

°C

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