S25FS128SDSMHI301 datasheet(10/154 Pages) SPANSION

Part #	S25FS128SDSMHI301

Description	MirrorBit Flash Non-Volatile Memory

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Manufacturer	SPANSION [SPANSION]

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10 / 154 page

10

S25FS-S Family

S25FS-S_00_04 November 6, 2013

Data

Sheet

(Pre limin ar y)

Tables

Table 1.1

Maximum Read Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 1.2

Maximum Read Rates DDR. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 1.3

Typical Program and Erase Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 1.4

Typical Current Consumption (–40°C to +85°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Table 2.1

Spansion SPI Families Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 3.1

Signal List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Table 4.1

Interface States Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 5.1

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 5.2

Latch-Up Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 5.3

FS-S Power-Up / Power-Down Voltage and Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 5.4

FS-S DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Table 6.1

AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Table 6.2

Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Table 6.3

Hardware Reset Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Table 6.4

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Table 6.5

AC Characteristics 80 MHz Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Table 8.1

S25FS256S Sector Address Map, Bottom 4-kB Sectors, 64-kB Physical Uniform Sectors . 55

Table 8.2

S25FS256S Sector Address Map, Top 4-kB Sectors, 64-kB Physical Uniform Sectors . . . . 55

Table 8.3

S25FS256S Sector Address Map, Uniform 64-kB Physical Sectors . . . . . . . . . . . . . . . . . . . 55

Table 8.4

S25FS256S Sector Address Map, Bottom 4-kB Sectors, 256-kB Logical Uniform Sectors . 55

Table 8.6

S25FS256S Sector Address Map, Uniform 256-kB Logical Sectors . . . . . . . . . . . . . . . . . . . 56

Table 8.7

S25FS128S Sector and Memory Address Map, Bottom 4-kB Sectors . . . . . . . . . . . . . . . . . 56

Table 8.8

S25FS128S Sector and Memory Address Map, Top 4-kB Sectors . . . . . . . . . . . . . . . . . . . . 56

Table 8.9

S25FS128S Sector and Memory Address Map, Uniform 64-kB Blocks . . . . . . . . . . . . . . . . 56

Table 8.5

S25FS256S Sector Address Map, Top 4-kB Sectors, 256-kB Logical Uniform Sectors . . . . 56

Table 8.10

S25FS128S Sector Address Map, Bottom 4-kB Sectors, 256-kB Logical Uniform Sectors . 57

Table 8.11

S25FS128S Sector Address Map, Top 4-kB Sectors, 256-kB Logical Uniform Sectors . . . . 57

Table 8.12

S25FS128S Sector and Memory Address Map, Uniform 256-kB Blocks . . . . . . . . . . . . . . . 57

Table 8.13

OTP Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Table 8.14

Status Register 1 Non-Volatile (SR1NV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Table 8.15

Status Register 1 Volatile (SR1V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Table 8.16

Status Register 2 Volatile (SR2V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Table 8.17

Configuration Register 1 Non-Volatile (CR1NV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

Table 8.18

Configuration Register 1 Volatile (CR1V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Table 8.19

Configuration Register 2 Non-Volatile (CR2NV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

Table 8.20

Latency Code (Cycles) Versus Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

Table 8.21

Configuration Register 2 Volatile (CR2V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

Table 8.22

Configuration Register 3 Non-Volatile (CR3NV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Table 8.23

Configuration Register 3 Volatile (CR3V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

Table 8.24

Configuration Register 4 Non-Volatile (CR4NV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Table 8.25

Output Impedance Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Table 8.26

Configuration Register 4 Volatile (CR4V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Table 8.27

ASP Register (ASPR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Table 8.28

Password Register (PASS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Table 8.29

PPB Lock Register (PPBL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Table 8.30

PPB Access Register (PPBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Table 8.31

DYB Access Register (DYBAR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Table 8.32

Non-Volatile Data Learning Register (NVDLR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Table 8.33

Volatile Data Learning Register (VDLR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Table 9.1

Upper Array Start of Protection (TBPROT_O = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Table 9.2

Lower Array Start of Protection (TBPROT_O = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Table 9.3

Sector Protection States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Table 10.1

S25FS-S Family Command Set (sorted by function) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Table 10.2

Block Protection Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

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