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MTP2P50E Datasheet(PDF) 1 Page - Motorola, Inc |
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MTP2P50E Datasheet(HTML) 1 Page - Motorola, Inc |
1 / 8 page 1 Motorola TMOS Power MOSFET Transistor Device Data Designer's™ Data Sheet TMOS E-FET.™ Power Field Effect Transistor P–Channel Enhancement–Mode Silicon Gate This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients. • Robust High Voltage Termination • Avalanche Energy Specified • Source–to–Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode • Diode is Characterized for Use in Bridge Circuits • IDSS and VDS(on) Specified at Elevated Temperature MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Symbol Value Unit Drain–Source Voltage VDSS 500 Vdc Drain–Gate Voltage (RGS = 1.0 MΩ) VDGR 500 Vdc Gate–Source Voltage — Continuous Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms) VGS VGSM ± 20 ± 40 Vdc Vpk Drain Current — Continuous Drain Current — Continuous @ 100 °C Drain Current — Single Pulse (tp ≤ 10 µs) ID ID IDM 2.0 1.6 6.0 Adc Apk Total Power Dissipation Derate above 25 °C PD 75 0.6 Watts W/ °C Operating and Storage Temperature Range TJ, Tstg – 55 to 150 °C Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, IL = 4.0 Apk, L = 10 mH, RG = 25 Ω) EAS 80 mJ Thermal Resistance — Junction to Case Thermal Resistance — Junction to Ambient R θJC R θJA 1.67 62.5 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8 ″ from case for 10 seconds TL 260 °C Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves — representing boundaries on device characteristics — are given to facilitate “worst case” design. E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Preferred devices are Motorola recommended choices for future use and best overall value. REV 1 Order this document by MTP2P50E/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA © Motorola, Inc. 1995 MTP2P50E TMOS POWER FET 2.0 AMPERES 500 VOLTS RDS(on) = 6.0 OHM Motorola Preferred Device ® CASE 221A–06, Style 5 TO–220AB D S G |
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