3

8008CS–AVR–03/09

ATtiny48/88

1.1

Pin Descriptions

1.1.1

VCC

Digital supply voltage.

1.1.2

GND

Ground.

1.1.3

Port A (PA3:0) (in 32-lead TQFP and 32-pad QFN/MLF packages, only)

Port A is a 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit) in 32-

lead TQFP and 32-pad QFN/MLF package. The PA3..0 output buffers have symmetrical drive

characteristics with both high sink and source capability. As inputs, Port A pins that are exter-

nally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-

stated when a reset condition becomes active, even if the clock is not running.

1.1.4

Port B (PB7:0)

Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port B output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Depending on the clock selection fuse settings, PB6 can be used as input to the internal clock

operating circuit.

1.1.5

Port C (PC7, PC5:0)

Port C is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

PC7 and PC5..0 output buffers have symmetrical drive characteristics with both high sink and

source capability. As inputs, Port C pins that are externally pulled low will source current if the

pull-up resistors are activated. The Port C pins are tri-stated when a reset condition becomes

active, even if the clock is not running.

1.1.6

PC6/RESET

If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical char-

acteristics of PC6 differ from those of the other pins of Port C.

If the RSTDISBL Fuse is unprogrammed, PC6 is used as a reset input. A low level on this pin for

longer than the minimum pulse width will generate a reset, even if the clock is not running. The

generate a reset.

1.1.7

Port D (PD7:0)

Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

PD7..4 output buffers have symmetrical drive characteristics with both high sink and source

capabilities, while the PD3..0 output buffers have stronger sink capabilities. As inputs, Port D