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AK7712 Datasheet(PDF) 5 Page - Asahi Kasei Microsystems |
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AK7712 Datasheet(HTML) 5 Page - Asahi Kasei Microsystems |
5 / 87 page ASAHI KASEI [AK7712A-VT] 0180-E-02 1997/12 - 5 - AK7712A DSP unit Block Diagram Data Address CP0,1 DP0,1 D0 a7 AD0 a16 CRAM 256 × 16 DRAM 128 × 24 Delay Data 16-bit Ext RAM Control OFRAM 40 × 16 CBUS (16-bit) DBUS (24-bit) MPX16 MPX24 Microcomputer Serial Micom I/F Control Interface D E C PRAM 384 × 32 X Y Multiply 16 × 24→40 24-bit 40-bit PC Stack:1Level 34-bit MUL DBUS SHIFT TMP 8 × 24-bit 34-bit SDIN1 (24/16-bit) 2 × 24/16-bit MSB/LSB justified Serial In SDIN2 (20/16-bit) 2 × 20/16-bit MSB justified Serial In (note 1) A B ALU 34-bit Overflow Margin:4bit SDOUT1 (24/16-bit) 2 × 24/16-bit MSB/LSB justified Serial Out DR0 a3 SDOUT2 (20/16-bit) 2 × 20/16-bit MSB justified Serial Out (note 2) 24-bit SDOUT3 (20/16-bit) 2 × 20/16-bi MSB justified Serial Out (note 3) Overflow Data Generator note 1: Normally it's connected to built-in ADC 2: Normally it's connected to built-in DAC1 Peak Detector 3: Normally it's connected to built-in DAC2 Division 16 ÷ 16→16 |
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