See mechanical drawings for dimensions.

NC – No internal connection

DBV PACKAGE

(TOP VIEW)

2

5

3

4

Y

1

B

GND

A

V

CC

DCK PACKAGE

(TOP VIEW)

3

4

GND

2

B

Y

1

A

5

V

CC

DRL PACKAGE

(TOP VIEW)

2

B

1

A

3

4

GND

Y

5

V

CC

YZP PACKAGE

(BOTTOM VIEW)

2

B

1

A

GND

4

3

Y

5

V

CC

DRY PACKAGE

(TOP VIEW)

B

NC

A

6

5

4

2

3

GND

Y

V

CC

1

6

5

4

2

3

1

DSF PACKAGE

(TOP VIEW)

B

A

GND

NC

Y

V

CC

A

GND

DPK PACKAGE

(TOP VIEW)

B

V

CC

Y

5

4

2

3

1

Y = A + B or Y =

•

A

B

SN74LVC1G32

www.ti.com

SCES219S – APRIL 1999 – REVISED JULY 2013

SINGLE 2-INPUT POSITIVE-OR GATE

Check for Samples: SN74LVC1G32

1

FEATURES

DESCRIPTION

This single 2-input positive-OR gate is designed for

2

•

Available in the Texas Instruments NanoStar™

and NanoFree™ Packages

The SN74LVC1G32 performs the Boolean function

•

in positive logic.

•

Inputs Accept Voltages to 5.5 V

NanoStar™ and NanoFree™ package technology is

•

a major breakthrough in IC packaging concepts,

•

Low Power Consumption, 10-

using the die as the package.

•

±24-mA Output Drive at 3.3 V

This device is fully specified for partial-power-down

•

Operation

outputs,

preventing

damaging

current

backflow

•

Latch-Up Performance Exceeds 100 mA Per

through the device when it is powered down.

JESD 78, Class II

•

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

–

200-V Machine Model (A115-A)

–

1000-V Charged-Device Model (C101)

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 1999–2013, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.