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AD7391ANZ Datasheet(PDF) 5 Page - Analog Devices

Part No. AD7391ANZ
Description  3 V Serial-Input Micropower 10-Bit and 12-Bit DACs
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD7391ANZ Datasheet(HTML) 5 Page - Analog Devices

 
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REV. A
AD7390/AD7391
–5–
DAC REGISTER LOAD
CLK
CLR
LD
CLK
SDI
AD7391
AD7390
t
LD1
D11
t
LD1
D10
D9
D7
D5
D4
D3
D2
D1
D0
t
LD2
t
DS
t
DH
t
CL
t
CH
t
LDW
t
S
t
CLRW
t
S
0.1% FS
ERROR BAND
SDI
LD
FS
ZS
VOUT
Figure 4. Timing Diagram
Table I. Control-Logic Truth Table
CLK
CLR
LD
Serial Shift Register Function
DAC Register Function
H
H
Shift-Register-Data Advanced One-Bit
Latched
X
H
L
Disables
Updated with Current Shift Register Contents
X
L
X
No Effect
Loaded with all Zeros
X
H
No Effect
Latched with all Zeros
X
L
Disabled
Previous SR Contents Loaded (Avoid usage of
CLR
when
LD is logic low, since SR data could be corrupted
if a clock edge takes place, while
CLR returns high.)
↑ = Positive logic transition.
X = Don’t care.
Table II. AD7390 Serial Input Register Data Format, Data is Loaded in the MSB-First Format
MSB
LSB
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
AD7390
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Table III. AD7391 Serial Input Register Data Format, Data is Loaded in the MSB-First Format
MSB
LSB
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
AD7391
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0


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