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74AHCT14PW Datasheet(PDF) 1 Page - NXP Semiconductors |
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74AHCT14PW Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 16 page 1. General description The 74AHC14; 74AHCT14 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74AHC14; 74AHCT14 provides six inverting buffers with Schmitt-trigger action. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. 2. Features I Balanced propagation delays I All inputs have Schmitt-trigger actions I Inputs accept voltages higher than VCC I Input levels: N For 74AHC14: CMOS level N For 74AHCT14: TTL level I ESD protection: N HBM EIA/JESD22-A114E exceeds 2000 V N MM EIA/JESD22-A115-A exceeds 200 V N CDM EIA/JESD22-C101C exceeds 1000 V I Multiple package options I Specified from −40 °C to +85 °C and from −40 °C to +125 °C 74AHC14; 74AHCT14 Hex inverting Schmitt trigger Rev. 05 — 4 May 2009 Product data sheet |
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