ASAHI KASEI

[AK4382]

MS0034-E-00

2000/7

- 10 -

MCLK

Sampling Speed

512fs

768fs

Normal

256fs

384fs

Double

128fs

192fs

Quad

Table 5. Sampling Speed (Auto Setting Mode)

LRCK

MCLK (MHz)

fs

128fs

192fs

256fs

384fs

512fs

768fs

Sampling Speed

32.0kHz

-

-

-

-

16.3840

24.5760

44.1kHz

-

-

-

-

22.5792

33.8688

48.0kHz

-

-

-

-

24.5760

36.8640

Normal

88.2kHz

-

-

22.5792

33.8688

-

-

96.0kHz

-

-

24.5760

36.8640

-

-

Double

176.4kHz

22.5792

33.8688

-

-

-

-

192.0kHz

24.5760

36.8640

-

-

-

-

Quad

Table 6. System Clock Example (Auto Setting Mode)

n Audio Serial Interface Format

Data is shifted in via the SDTI pin using BICK and LRCK inputs. The DIF0-2 as shown in Table 7 can select five serial

data modes. In all modes the serial data is MSB-first, 2’s compliment format and is latched on the rising edge of BICK.

Mode 2 can be used for 16/20 MSB justified formats by zeroing the unused LSBs.

Mode

DIF2

DIF1

DIF0

SDTI Format

BICK

Figure

0

0

0

0

16bit LSB Justified

³32fs

Figure 1

1

0

0

1

20bit LSB Justified

³40fs

Figure 2

2

0

1

0

24bit MSB Justified

³48fs

Figure 3

Default

3

0

1

1

24bit I

³48fs

Figure 4

4

1

0

0

24bit LSB Justified

³48fs

Figure 2

Table 7. Audio Data Formats