AD9861BCP-80 datasheet(9/52 Pages) AD

Part #	AD9861BCP-80

Description	Mixed-Signal Front-End (MxFE) Baseband Transceiver for Broadband Applications

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AD9861

Rev. 0 | Page 9 of 52

Pin No.

Name1

Description2, 3

34

AUX_SPI_CLK

CLK for AuxSPI.

35–44

L9–L0

Lower Data Bit 9 to Lower Data Bit 0.

45

AUX3

Configurable as either AuxADC_B or AuxDAC_C.

46

RESET

Chip Reset When Low.

47

AUX_ADC_REF

Decoupling for AuxADC On-Chip Reference.

48

CLKIN

Clock Input.

52

REFB

ADC Bottom Reference.

54, 55

VIN+B, VIN−B

ADC B Differential Input.

56

VREF

ADC Band Gap Reference.

57, 58

VIN−A, VIN+A

ADC A Differential Input.

60

REFT

ADC Top Reference.

62

RxPwrDwn

Rx Analog Power-Down Control.

63

TxPwrDwn

Tx Analog Power-Down Control.

64

SPI_CS

SPI: Serial Port Chip Select. At power-up or reset, this must be high.

No SPI: Tie low to disable SPI and use mode pins. This pin must be tied low.

1 Underlined pin names and descriptions apply when the device is configured without a serial port interface, referred to as no SPI mode.

2 Pin function depends if the serial port is used to configure the AD9861 (called SPI mode) or if mode pins are used to configure the AD9861 (called No SPI mode). The

differences are indicated by the SPI and No SPI labels in the description column.

3 Some pin descriptions depend on the interface configuration, full-duplex (FD), half-duplex interleaved data (HD10), half-duplex parallel data (HD20), and a half-duplex

interface similar to the AD9860 and AD9862 data interface called clone mode (Clone). Clone mode requires a serial port interface.

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