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ISL6146DFRZ-TK Datasheet(PDF) 7 Page - Intersil Corporation |
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ISL6146DFRZ-TK Datasheet(HTML) 7 Page - Intersil Corporation |
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7 / 28 page  ISL6146 7 FN7667.4 April 26, 2013 ttoffs Slow Turn-off Time VIN = VBIAS = 12V, VGATE = 18V to 10V, CGATE = 57nF 58 80 µs ION Turn-On Current BIAS = 12V, VG = 0V 1 mA BIAS = 12V, VG = 20V 0.15 mA VVG_FLTr GATE to VIN Rising Fault Voltage GATE > VIN, enabled, FLT output is high. (Does not apply to ISL6146D and ISL6146E) 320 440 560 mV VVG_FLTf GATE to VIN Falling Fault Voltage GATE > VIN, enabled, FLT output is low. (Does not apply to ISL6146D and ISL6146E) 140 220 300 mV CONTROL AND REGULATION I/O VRr Reverse Voltage Detection Rising VOUT Threshold VOUT rising 35 57 79 mV VRf Reverse Voltage Detection Falling VOUT Threshold VOUT falling 10 30 51 mV tRs Reverse Voltage Detection Response Time 10 µs VFWD_VR Amplifier Forward Voltage Regulation ISL6146 controls voltage across FET VDS to VFWD_VR during static forward operation at loads resulting in Id*rDS(ON) < VFWD_VR 11 19 28 mV VOS_HS HS Comparator Input Offset Voltage -14 0.7 14 mV VTH(HS5k) ADJ Adjust Threshold with 5k to GND RADJ = 5kΩ to GND 0.57 0.8 1.1 V VTH(HS100k) ADJ Adjust Threshold with 100k to GND RADJ = 100kΩ to GND 10 40 95 mV tHSpd HS Comparator Response Time VOUT > VIN, 1ns transition, 5V differential 170 ns VFWD_FLT VIN to VOUT Forward Fault Voltage VIN > VOUT, GATE is fully on, FLT output is low 330 450 570 mV VFWD_FLT_HYS VIN to VOUT Forward Fault Voltage Hysteresis VIN > VOUT, GATE is fully on, FLT output is high 44 mV FAULT OUTPUT IFLT_SINK FAULT Sink Current BIAS = 18V FAULT = 0.5V, VIN < VOUT, VGATE = VGL 5 9mA IFLT_LEAK FAULT Leakage Current FAULT = “VFLT_H”, VIN > VOUT, VGATE = VIN + VGQP 0.04 10 µA tFLT_L2H FAULT Low to High Delay GATE = VGQP to FAULT output is high 10 23 µs tFLT_H2L FAULT High to Low Delay GATE = VIN to FAULT output is low 1.7 3 µs ENABLE UVLO/OVP/ADJ INPUTS VthRa ISL6146A/D EN Rising Vth 580 606 631 mV VthR_hysa ISL6146A/D EN Vth Hysteresis -90 mV VthFb ISL6146B/E EN Falling Vth 580 606 631 mV VthF_hysb ISL6146B/E EN Vth Hysteresis +90 mV VthFc ISL6146C OVP Falling Vth 580 606 631 mV VthF_hysc ISL6146C OVP Vth Hysteresis +90 mV VthRc ISL6146C UVLO Rising Vth 580 606 631 mV VthR_hysc ISL6146C UVLO Vth Hysteresis -90 mV tEN2GTER EN/UVLO Rising to GATE Rising Delay 10 12 µs EN/OVP Falling to GATE Rising Delay 9 12 µs Electrical Specifications VCC = BIAS = 12V, unless otherwise stated. TA = +25°C to +85°C. Boldface limits apply over the operating temperature range, -40°C to +125°C. (Continued) SYMBOL PARAMETERS TEST CONDITIONS MIN (Note 8) TYP MAX (Note 8) UNITS |
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