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APL5610CCI-TRG Datasheet(PDF) 8 Page - Anpec Electronics Coropration |
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APL5610CCI-TRG Datasheet(HTML) 8 Page - Anpec Electronics Coropration |
8 / 17 page Copyright © ANPEC Electronics Corp. Rev. A.7 - May., 2011 APL5610/A/B/C www.anpec.com.tw 8 PIN NO. NAME FUNCTION 1 EN Enable control pin. Pulling the EN high (VEN>1.6) enables the VOUT; forcing the EN low (VEN<0.4V) disables the VOUT. When re-enabled, the IC undergoes a new soft-start process. 2 GND Ground pin of the circuitry. All voltage levels are measured with respect to this pin. 3 FB Voltage Feedback Pin. Connecting this pin to an external resistor divider receives the feedback voltage of the regulator. 4 POK Power-OK signal output pin. This pin is an open-drain output used to indicate the status of output voltage by sensing FB voltage. This pin is pulled low when output voltage is not within the Power-OK voltage window. 5 DRV This pin drives the gate of an external N-channel MOSFET for linear regulator. 6 VCC Power input pin of the device. The voltage at this pin is monitored for Power-On-Reset purpose. Pin Description Block Diagram FB 75%V REF EN VCC DRV GND POK Delay Enable_EA PWOK Internal Regulator UVP Comparator Control Logic 90%V REF 0.8V V REF 0.8V Enable Power-On Reset Soft- Start Power-OK Comparator Error Amplifier UV |
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