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TMC2250A Datasheet(PDF) 7 Page - Fairchild Semiconductor

Part # TMC2250A
Description  Matrix Multiplier 12 x 10 bit, 50 MHz
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

TMC2250A Datasheet(HTML) 7 Page - Fairchild Semiconductor

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TMC2250A
PRODUCT SPECIFICATION
REV. 1.0.2 10/25/00
7
Notes:
1. The output ports X, Y, Z and CASOUT, and input port CASIN are internally reconfigured by the device as required for each
mode of the device. The multiple-function pins have names which are combinations of these titles, as appropriate.
2. The output drivers on pins XC11-0 and YC11-8 are not necessarily disabled until after the first rising edge of CLK following
power-up. If these pins are to be tied to other output drivers, to each other, or to ground or VDD, the user should ensure that
a clock pulse arrives within a few seconds of power-up, to avoid bus contention.
KA9-0
K13, J11, K12,
L13, L12, K11,
M13, M12,
L11, N13
69, 68, 67, 66,
65, 64, 63, 62,
61, 60
Coefficient
Input A1, A2,
A3
Data presented to the 10-bit registered coefficient
input ports KA, KB and KC are latched three at a time
into the internal coefficient storage register set
indicated by the Coefficient Write Enable CWE1,0 on
the next clock, as shown in Table 4.
KB9-0
M11, L10,
N12, N11,
M10, L9, N10,
M9, N9, L8
59, 58, 57, 56,
55, 54, 53, 52,
51, 50
Coefficient
Input B1, B2,
B3
KC9-0
M8, N8, N7,
M7, N6, M6,
N5, M5, N4, L5
49, 48, 47, 45,
44, 43, 41, 40,
39, 38
Coefficient
Input B1, B2,
B3
XC11-0
B4, A3, A2, B3,
A1, C3, B2, B1,
D3, C2, C1, D2
115, 116,
117, 119,
120, 1, 2, 3, 4,
5, 6, 7
CASIN15-4/
Output X
In all modes except Mode 00, the x port and four bits
of the Y output port are reconfigured as the 16-bit
registered Cascade Input port CASIN15-0. Data
presented to this input will be added to the weighted
sums of the data words which were presented to the
input ports (A, B and C).
In the matrix multiply mode, data are available at the
12-bit registered output ports X, Y AND Z tDO after
every clock. These ports are reconfigured in the
filtering modes as 16-bit Cascade Input and Output
ports.CASOUT15-0
In all modes except Mode 00, the Z port and four bits
of the Y output port are reconfigured as the 16-bit
registered Cascade Output port CASOUT15-0.
YC11-8
D1, E2, E1, F2 9, 10, 11, 13
CASIN3-0/
Output Y11-0
Y7-4
F1, G2, G1, H1 14, 15, 17, 18 Output7-4 only
YC3-0
K1, J2, J1, H2 23, 22, 21, 19 CASOUT3-0/
Output Y3-0
ZC11-0
M4, N3, M3,
N2, M2, L3,
N1, L2, K3,
M1, L1, K2
37, 36, 35, 33,
32, 31, 30, 29,
28, 27, 26, 25
CASOUT15-4/
Output Z11-0
Pin Descriptions (continued)
Pin Name
Pin Number
Function
Pin Description
CPGA/PPGA/
MPGA
MQFP
Table 3. Configuration Mode Word
Table 4. Coefficient Write Enable Word
MODE1,0
Configuration Mode
00
3 x 3 Matrix Multiply
01
9-Tap One Dimensional FIR
10
3 x 3 -Pixel Convolver
11
4 x 2 -Pixel Convolver
CWE1,0
Coefficient Set Selected
00
Hold all registers
01
Update KA1, KB1, KC1
10
Update KA2, KB2, KC2
11
Update KA3, KB3, KC3


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