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LPC11U35FET48 Datasheet(PDF) 54 Page - NXP Semiconductors |
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LPC11U35FET48 Datasheet(HTML) 54 Page - NXP Semiconductors |
54 / 76 page LPC11U3X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 2 — 25 November 2013 54 of 76 NXP Semiconductors LPC11U3x 32-bit ARM Cortex-M0 microcontroller 11. Application information 11.1 Suggested USB interface solutions The USB device can be connected to the USB as self-powered device (see Figure 27) or bus-powered device (see Figure 28). On the LPC11U3x, the PIO0_3/USB_VBUS pin is 5 V tolerant only when VDD is applied and at operating voltage level. Therefore, if the USB_VBUS function is connected to the USB connector and the device is self-powered, the USB_VBUS pin must be protected for situations when VDD = 0 V. If VDD is always greater than 0 V while VBUS = 5 V, the USB_VBUS pin can be connected directly to the VBUS pin on the USB connector. For systems where VDD can be 0 V and VBUS is directly applied to the VBUS pin, precautions must be taken to reduce the voltage to below 3.6 V, which is the maximum allowable voltage on the USB_VBUS pin in this case. One method is to use a voltage divider to connect the USB_VBUS pin to the VBUS on the USB connector. The voltage divider ratio should be such that the USB_VBUS pin will be greater than 0.7VDD to indicate a logic HIGH while below the 3.6 V allowable maximum voltage. For the following operating conditions VBUSmax = 5.25 V VDD = 3.6 V, the voltage divider should provide a reduction of 3.6 V/5.25 V or ~0.686 V. Fig 27. USB interface on a self-powered device where USB_VBUS = 5 V LPC1xxx USB-B connector USB_DP USB_CONNECT soft-connect switch USB_DM USB_VBUS VSS VDD R1 1.5 kΩ RS = 33 Ω aaa-010178 RS = 33 Ω R2 R3 |
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