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LPC11U35FBD64401 Datasheet(PDF) 27 Page - NXP Semiconductors |
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LPC11U35FBD64401 Datasheet(HTML) 27 Page - NXP Semiconductors |
27 / 76 page LPC11U3X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 2 — 25 November 2013 27 of 76 NXP Semiconductors LPC11U3x 32-bit ARM Cortex-M0 microcontroller consumption by eliminating all dynamic power use in any peripherals that are not required for the application. Selected peripherals have their own clock divider which provides even better power control. 7.18.5.1 Power profiles The power consumption in Active and Sleep modes can be optimized for the application through simple calls to the power profile. The power configuration routine configures the LPC11U3x for one of the following power modes: • Default mode corresponding to power configuration after reset. • CPU performance mode corresponding to optimized processing capability. • Efficiency mode corresponding to optimized balance of current consumption and CPU performance. • Low-current mode corresponding to lowest power consumption. In addition, the power profile includes routines to select the optimal PLL settings for a given system clock and PLL input clock. Remark: When using the USB, configure the LPC11U3x in Default mode. 7.18.5.2 Sleep mode When Sleep mode is entered, the clock to the core is stopped. Resumption from the Sleep mode does not need any special sequence but re-enabling the clock to the ARM core. In Sleep mode, execution of instructions is suspended until either a reset or interrupt occurs. Peripheral functions continue operation during Sleep mode and can generate interrupts to cause the processor to resume execution. Sleep mode eliminates dynamic power used by the processor itself, by memory systems and related controllers, and by internal buses. 7.18.5.3 Deep-sleep mode In Deep-sleep mode, the LPC11U3x is in Sleep-mode and all peripheral clocks and all clock sources are off except for the IRC. The IRC output is disabled unless the IRC is selected as input to the watchdog timer. In addition all analog blocks are shut down and the flash is in stand-by mode. In Deep-sleep mode, the application can keep the watchdog oscillator and the BOD circuit running for self-timed wake-up and BOD protection. The LPC11U3x can wake up from Deep-sleep mode via reset, selected GPIO pins, a watchdog timer interrupt, or an interrupt generating USB port activity. Deep-sleep mode saves power and allows for short wake-up times. 7.18.5.4 Power-down mode In Power-down mode, the LPC11U3x is in Sleep-mode and all peripheral clocks and all clock sources are off except for watchdog oscillator if selected. In addition all analog blocks and the flash are shut down. In Power-down mode, the application can keep the BOD circuit running for BOD protection. The LPC11U3x can wake up from Power-down mode via reset, selected GPIO pins, a watchdog timer interrupt, or an interrupt generating USB port activity. |
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