Electronic Components Datasheet Search
  English  ▼

Delete All


Preview PDF Download HTML

AD5122A Datasheet(PDF) 22 Page - Analog Devices

Part No. AD5122A
Description  Quad Channel, 128-/256-Position, I2C Nonvolatile Digital Potentiometer
Download  28 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5122A Datasheet(HTML) 22 Page - Analog Devices

Back Button AD5122A Datasheet HTML 18Page - Analog Devices AD5122A Datasheet HTML 19Page - Analog Devices AD5122A Datasheet HTML 20Page - Analog Devices AD5122A Datasheet HTML 21Page - Analog Devices AD5122A Datasheet HTML 22Page - Analog Devices AD5122A Datasheet HTML 23Page - Analog Devices AD5122A Datasheet HTML 24Page - Analog Devices AD5122A Datasheet HTML 25Page - Analog Devices AD5122A Datasheet HTML 26Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 22 / 28 page
background image
Data Sheet
Rev. A | Page 22 of 28
±6 dB Increment and Decrement Instructions
Two programming instructions produce logarithmic taper
increment or decrement of the wiper position control by
an individual potentiometer or by a ganged potentiometer
arrangement where all RDAC register positions are changed
simultaneously. The +6 dB increment is activated by Command 6,
and the −6 dB decrement is activated by Command 7 (see Table 15).
For example, starting with the zero-scale position and executing
Command 6 ten times moves the wiper in 6 dB steps to the full-
scale position. When the wiper position is near the maximum
setting, the last 6 dB increment instruction causes the wiper to
go to the full-scale position (see Table 13).
Incrementing the wiper position by +6 dB essentially doubles
the RDAC register value, whereas decrementing the wiper
position by −6 dB halves the register value. Internally, the
AD5123/AD5143 use shift registers to shift the bits left and
right to achieve a ±6 dB increment or decrement. These
functions are useful for various audio/video level adjustments,
especially for white LED brightness settings in which human
visual responses are more sensitive to large adjustments than to
small adjustments.
Table 13. Detailed Left Shift and Right Shift Functions for
the ±6 dB Step Increment and Decrement
Left Shift (+6 dB/Step)
Right Shift (−6 dB/Step)
0000 0000
1111 1111
0000 0001
0111 1111
0000 0010
0011 1111
0000 0100
0001 1111
0000 1000
0000 1111
0001 0000
0000 0111
0010 0000
0000 0011
0100 0000
0000 0001
1000 0000
0000 0000
1111 1111
0000 0000
Burst Mode
By enabling the burst mode, multiple data bytes can be sent to
the part consecutively. After the command byte, the part
interprets the consecutive bytes as data bytes for the command.
A new command can be sent by generating a repeat start or by a
stop and start condition.
The burst mode is activated by setting Bit D3 of the control
register (see Table 17).
The AD5123/AD5143 can be reset through software by executing
Command 14 (see Table 15). The reset command loads the
RDAC registers with the contents of the EEPROM and takes
approximately 30 µs. The EEPROM is preloaded to midscale at
the factory, and initial power-up is, accordingly, at midscale.
Shutdown Mode
The AD5123/AD5143 can be placed in shutdown mode by
executing the software shutdown command, Command 15
(see Table 15), and setting the LSB (D0) to 1. This feature places
the RDAC in a zero power consumption state where the device
operates in potentiometer mode, Terminal A is open-circuited,
and the wiper, Terminal W, is connected to Terminal B; however, a
finite wiper resistance of 40 Ω is present. When the device is
configured in linear gain setting mode, the resistor addressed,
RAW or RWB, is internally place at high impedance. Table 14
shows the truth table depending on the device operating mode.
The contents of the RDAC register are unchanged by entering
shutdown mode. However, all commands listed in Table 15 are
supported while in shutdown mode. Execute Command 15 (see
Table 15) and set the LSB (D0) to 0 to exit shutdown mode.
Table 14. Truth Table for Shutdown Mode
Linear Gain Setting Mode
Potentiometer Mode
High impedance
High impedance
High impedance
The EEPROM and RDAC registers can be protected by disabling
any update to these registers. This can be done by using software or
by using hardware. If these registers are protected by software,
set Bit D0 and/or Bit D1 (see Table 17), which protects the RDAC
and EEPROM registers independently.
When RDAC is protected, the only operation allowed is to copy
the EEPROM into the RDAC register.

Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28 

Datasheet Download

Go To PDF Page

Link URL

Privacy Policy
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com

Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn