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ADSP-BF533 Datasheet(PDF) 28 Page - Analog Devices

Part No. ADSP-BF533
Description  Blackfin Embedded Processor
Download  64 Pages
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADSP-BF533 Datasheet(HTML) 28 Page - Analog Devices

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Rev. I
|
Page 28 of 64
|
August 2013
ADSP-BF531/ADSP-BF532/ADSP-BF533
Asynchronous Memory Read Cycle Timing
Table 23. Asynchronous Memory Read Cycle Timing
VDDEXT = 1.8 V
VDDEXT = 2.5 V/3.3 V
Parameter
Min
Max
Min
Max
Unit
Timing Requirements
tSDAT
DATA15 – 0 Setup Before CLKOUT
2.1
2.1
ns
tHDAT
DATA15 – 0 Hold After CLKOUT
1.0
0.8
ns
tSARDY
ARDY Setup Before CLKOUT
4.0
4.0
ns
tHARDY
ARDY Hold After CLKOUT
1.0
0.0
ns
Switching Characteristics
tDO
Output Delay After CLKOUT1
1 Output pins include AMS3–0, ABE1–0, ADDR19–1, DATA15–0, AOE, ARE.
6.0
6.0
ns
tHO
Output Hold After CLKOUT 1
1.0
0.8
ns
Figure 13. Asynchronous Memory Read Cycle Timing
tSARDY
tHARDY
tSARDY
tHARDY
SETUP
2 CYCLES
PROGRAMMED READ
ACCESS 4 CYCLES
ACCESS EXTENDED
3 CYCLES
HOLD
1 CYCLE
tDO
tHO
tDO
tSDAT
tHDAT
CLKOUT
AMSx
ABE1–0
ADDR19–1
AOE
ARE
ARDY
DATA 15–0
tHO


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