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AD8582ANZ Datasheet(PDF) 3 Page - Analog Devices |
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AD8582ANZ Datasheet(HTML) 3 Page - Analog Devices |
3 / 8 page –3– REV. 0 AD8582 WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8582 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS* VDD to DGND & AGND . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V Logic Inputs to DGND . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V VOUT to AGND . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V VREF to AGND . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD + 0.3 V AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, VDD IOUT Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . . 50 mA Package Power Dissipation . . . . . . . . . . . . . . . (TJ max–TA)/θJA Thermal Resistance, θ JA 24-Pin Plastic DIP Package (N-24) . . . . . . . . . . . . . 62 °C/W 24-Lead SOIC Package (SOL-24) . . . . . . . . . . . . . . 73 °C/W Maximum Junction Temperature (TJ max) . . . . . . . . . . 150 °C Operating Temperature Range . . . . . . . . . . . . . –40 °C to +85°C Storage Temperature Range . . . . . . . . . . . . . –65 °C to +150°C Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300 °C *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PIN DESCRIPTION Pin No. Name Description 1, 24 VOUTA Voltage outputs from the DACs. Fixed VOUTB output voltage range of 0 V to 4.095 V with 1 mV/LSB. An internal temperature stabilized reference maintains a fixed full-scale voltage independent of time, temperature and power supply variations. 2 AGND Analog Ground. Ground reference for the internal bandgap reference voltage, the DAC, and the output buffer. 3 DGND Digital ground for input logic. 4, 21 LDA, Load DAC register strobes. Transfers LDB input register data to the DAC registers. Active low inputs, Level sensitive latch. May be connected together to double- buffer load DAC registers. 5 MSB Digital Input: High presets DAC registers to half scale (800H), Low clears DAC registers to zero (000H) upon RST assertion. 6 RST Active low digital input that clears the DAC register to zero, setting the DAC to minimum scale when MSB pin = 0, or half-scale when MSB pin = 1. 7–18 DB0–11 Twelve Binary Data Bit Inputs. DB11 is the MSB and DB0 is the LSB. 19 CS Chip Select. Active low input. 20 A /B Select DAC A = 0 or DAC B = 1. 22 VDD Positive Supply. Nominal value +5 V, ±5%. 23 VREF Nominal 2.5 V reference output voltage. This node must be buffered if required to drive external loads. PIN CONFIGURATIONS N-24 24-Pin Plastic DIP SOL-24 24-Pin SOIC VOUTA AGND VOUTB VREF MSB DB0 DB11 DGND VDD DB1 DB10 DB2 DB9 DB3 DB8 DB4 DB7 DB5 DB6 14 1 2 24 23 5 6 7 20 19 18 3 4 22 21 8 17 9 16 10 15 11 TOP VIEW (Not to Scale) 12 13 AD8582 LDA RST LDB CS A/B TOP VIEW (Not to Scale) 12 13 AD8582 1 24 LDA, LDB CS A/B D0–D11 RST t AS t AH t DS t DH t LDW t RSW t LS t LH VOUT t S t S ± 1LSB ERROR BAND t CSW Timing Diagram ORDERING INFORMATION* Temperature Package Package Model Range Description Option AD8582AN –40 °C to +85°C 24-Pin Plastic DIP N-24 AD8582AR –40 °C to +85°C 24-Lead SOIC SOL-24 AD8582Chips +25 °C Die *For die specifications contact your local Analog Devices sales office. The AD8582 contains 1270 transistors. |
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