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5CSEA2 Datasheet(PDF) 8 Page - Altera Corporation

Part # 5CSEA2
Description  Cyclone V Device Handbook
Download  74 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

5CSEA2 Datasheet(HTML) 8 Page - Altera Corporation

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Chapter 1: Overview for Cyclone V Device Family
Cyclone V Features Summary
Cyclone V Device Handbook
February 2012
Altera Corporation
Volume 1: Device Overview and Datasheet
Cyclone V Features Summary
Some of the key features of the Cyclone V devices include:
Built-in hard IP blocks
Support for all mainstream single-ended and differential I/O standards including
3.3 V at up to 16 mA drive strengths
HPS for the Cyclone V SE, SX, and ST variants
Comprehensive design protection features to protect your valuable IP investments
Lowest system cost advantage—requires only two core voltages to operate, are
available in low-cost wirebond packaging, and includes innovative cost saving
features such as Configuration via Protocol (CvP) and partial reconfiguration
Table 1–1 lists a summary of the Cyclone V features.
Table 1–1. Summary of Features for Cyclone V Devices (Part 1 of 2)
Feature
Details
Technology
TSMC’s 28-nm low power (28LP) process technology
1.1-V core voltage
Low-power
high-speed serial
interface
614 Mbps to 5.0 Gbps integrated transceiver speed
Transmitter pre-emphasis and receiver equalization
Dynamic partial reconfiguration of individual channels
FPGA
General-purpose
I/Os (GPIOs)
875 Mbps LVDS receiver and 840 Mbps LVDS transmitter
400 MHz/800 Mbps external memory interface
On-chip termination (OCT)
3.3-V support with up to 16 mA drive strength
Hard IP blocks
Embedded
transceiver I/O
PCI Express® (PCIe®) Gen2 (x1 or x2) and Gen1 (x1, x2, or x4) hard IP with
multifunction support, endpoint, and root port
Variable-precision
DSP
Native support for three signal processing precision levels (three 9 x 9s, two
18 x 19s, or one 27 x 27 multiplier) in the same variable-precision DSP block
64-bit accumulator and cascade
Embedded internal coefficient memory
Preadder/subtractor for improved efficiency
Memory controller
DDR3, DDR2, LPDDR, and LPDDR2


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