Electronic Components Datasheet Search |
|
TMS27PC010A-20FML Datasheet(PDF) 7 Page - Texas Instruments |
|
TMS27PC010A-20FML Datasheet(HTML) 7 Page - Texas Instruments |
7 / 13 page TMS27C010A 131 072 BY 8BIT UV ERASABLE TMS27PC010A 131 072 BY 8BIT PROGRAMMABLE READONLY MEMORIES SMLS110C − NOVEMBER 1990 − REVISED SEPTEMBER 1997 7 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature PARAMETER TEST CONDITIONS MIN MAX UNIT VOH High-level dc output voltage IOH = − 20 µA VCC −0.2 V VOH High-level dc output voltage IOH = −2.5 mA 3.5 V VOL Low-level dc output voltage IOL = 2.1 mA 0.4 V VOL Low-level dc output voltage IOL = 20 µA 0.1 V II Input current (leakage) VI = 0 V to 5.5 V ±1 µA IO Output current (leakage) VO = 0 V to VCC ±1 µA IPP1 VPP supply current VPP = VCC = 5.5 V 10 µA IPP2 VPP supply current (during program pulse) VPP = 13 V 50 mA ICC1 VCC supply current (standby) TTL-input level VCC = 5.5 V, E = VIH 500 A ICC1 VCC supply current (standby) CMOS-input level VCC = 5.5 V, E = VCC ± 0.2 V 100 µA VCC = 5.5 V, E = VIL ICC2 VCC supply current (active) (output open) VCC = 5.5 V, E = VIL tcycle = minimum cycle time†, outputs open 30 mA ICC2 VCC supply current (active) (output open) tcycle = minimum cycle time†, outputs open 30 mA † Minimum cycle time = maximum access time. capacitance over recommended ranges of supply voltage and operating free-air temperature, f = 1 MHz‡ PARAMETER TEST CONDITIONS MIN TYP§ MAX UNIT CI Input capacitance VI = 0 V, f = 1 MHz 4 8 pF CO Output capacitance VO = 0 V, f = 1 MHz 6 10 pF ‡ Capacitance measurements are made on sample basis only. § All typical values are at TA = 25°C and nominal voltages. switching characteristics over recommended ranges of operating conditions (see Notes 4 and 5) PARAMETER TEST CONDITIONS ’27C010A-10 ’27PC010A-10 ’27C010A-12 ’27PC010A-12 ’27C010A-15 ’27PC010A-15 ’27C010A-20 ’27PC010A-20 UNIT PARAMETER CONDITIONS MIN MAX MIN MAX MIN MAX MIN MAX UNIT ta(A) Access time from address 100 120 150 200 ns ta(E) Access time from chip enable CL = 100 pF, 100 120 150 200 ns ten(G) Output enable time from G CL = 100 pF, 1 Series 74 55 55 75 75 ns tdis Output disable time from G or E, whichever occurs first¶ 1 Series 74 TTL load, Input tr ≤ 20 ns, 0 50 0 50 0 60 0 60 ns tv(A) Output data valid time after change of address, E, or G, whichever occurs first¶ Input tr ≤ 20 ns, Input tf ≤ 20 ns 0 0 0 0 ns ¶ Value calculated from 0.5-V delta to measured output level. NOTES: 4. For all switching characteristics the input pulse levels are 0.4 V to 2.4 V. Timing measurements are made at 2 V for logic high and 0.8 V for logic low (see Figure 2). 5. Common test conditions apply for tdis except during programming. |
Similar Part No. - TMS27PC010A-20FML |
|
Similar Description - TMS27PC010A-20FML |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |