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74HC595D Datasheet(PDF) 12 Page - NXP Semiconductors |
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74HC595D Datasheet(HTML) 12 Page - NXP Semiconductors |
12 / 24 page 74HC_HCT595 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 12 December 2011 12 of 24 NXP Semiconductors 74HC595; 74HCT595 8-bit serial-in, serial or parallel-out shift register with output latches; 3-state [1] Typical values are measured at nominal supply voltage. [2] tpd is the same as tPHL and tPLH. [3] tpd is the same as tPHL only. [4] ten is the same as tPZL and tPZH. [5] tdis is the same as tPLZ and tPHZ. [6] CPD is used to determine the dynamic power dissipation (PD in W). PD =CPD VCC2 fi + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; (C L VCC 2 f o) = sum of outputs; CL = output load capacitance in pF; VCC = supply voltage in V. [7] All 9 outputs switching. 12. Waveforms trec recovery time MR to SHCP; see Figure 12 10 7- 13 - 15 - ns fmax maximum frequency SHCP and STCP; see Figure 9 and 10 30 52 - 24 - 20 - MHz CPD power dissipation capacitance fi = 1 MHz; VI =GND to VCC [6] [7] - 130 - - - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 14. Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit Min Typ[1] Max Min Max Min Max Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig 9. Shift clock pulse, maximum frequency and input to output propagation delays mna557 SH CP input Q7S output tPLH tPHL tW 1/fmax VM VOH VI GND VOL VM |
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