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HCPL-2611 Datasheet(PDF) 10 Page - AVAGO TECHNOLOGIES LIMITED |
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HCPL-2611 Datasheet(HTML) 10 Page - AVAGO TECHNOLOGIES LIMITED |
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10 / 16 page  10 Figure 10. Test circuit for t EHL and tELH. Figure 11. Typical enable propagation delay vs. temperature. Figure 7. Typical propagation delay vs. temperature. Figure 8. Typical propagation delay vs. pulse input current. Figure 9. Typical pulse width distortion vs. temperature. Figure 6. Test circuit for t PHL and tPLH. OUTPUT V MONITORING NODE O +5 V 7 5 6 8 2 3 4 1 PULSE GEN. Z = 50 Ω t = t = 5 ns O f I I L R RM CC V 0.1µF BYPASS *CL *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. GND INPUT MONITORING NODE r 1.5 V tPHL tPLH I I INPUT O V OUTPUT I = 7.50 mA I I = 3.75 mA I VCC = 5 V II = 7.5 mA 100 80 -60 -20 20 60 100 TA – TEMPERATURE – °C 60 80 40 0 -40 0 40 20 tPLH , RL = 4 KΩ tPLH , RL = 1 KΩ tPLH , RL = 350 Ω tPHL , RL = 350 Ω 1 K Ω 4 K Ω VCC = 5 V TA = 25°C 105 90 59 13 II – PULSE INPUT CURRENT – mA 75 15 11 7 30 60 45 tPLH , RL = 4 KΩ tPLH , RL = 1 KΩ tPLH , RL = 350 Ω tPHL , RL = 350 Ω 1 K Ω 4 K Ω VCC = 5 V II = 7.5 mA 40 30 -20 20 60 100 TA – TEMPERATURE – °C 20 80 40 0 -40 10 RL = 350 kΩ RL = 1 kΩ RL = 4 kΩ 0 -60 -10 OUTPUT V MONITORING NODE O 1.5 V tEHL tELH VE INPUT O V OUTPUT 3.0 V 1.5 V +5 V 7 5 6 8 2 3 4 1 PULSE GEN. Z = 50 Ω t = t = 5 ns O f I I L R CC V 0.1 µF BYPASS *CL *CL IS APPROXIMATELY 15 pF WHICH INCLUDES PROBE AND STRAY WIRING CAPACITANCE. GND r 7.5 mA INPUT VE MONITORING NODE -60 0 TA – TEMPERATURE – °C 100 90 120 -20 30 20 60 -40 0 40 80 60 VCC = 5 V VEH = 3 V VEL = 0 V II = 7.5 mA tELH, RL = 4 kΩ tELH, RL = 1 kΩ tEHL, RL = 350 Ω, 1 kΩ, 4 kΩ tELH, RL = 350 Ω |
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