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ADSP-2101 Datasheet(PDF) 14 Page - Analog Devices |
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ADSP-2101 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 64 page  ADSP-21xx –14– REV. B A signed ROM Verification Form and a purchase order for production units are required prior to any product being manufactured. Prototype units may be applied toward the minimum order quantity. Upon completion of prototype manufacture, Analog Devices will ship prototype units and a delivery schedule update for production units. An invoice against your purchase order for the NRE charges is issued at this time. There is a charge for each ROM mask generated and a mini- mum order quantity. Consult your sales representative for details. A separate order must be placed for parts of a specific package type, temperature range, and speed grade. Package & Speed Lot # & Revision Code Date Code ← ← ← Functional Differences for Older Revision Devices Older revisions of the ADSP-21xx processors have slight differences in functionality. The two differences are as follows: • Bus Grant (BG) is asserted in the same cycle that Bus Request (BR) is recognized (i.e. when setup and hold time requirements are met for the BR input). Bus Request input is a synchronous input rather than asynchronous. (In newer revision devices, BG is asserted in the cycle after BR is recognized.) • Only the standard IDLE instruction is available, not the clock-reducing IDLE n instruction. To determine the revision of a particular ADSP-21xx device, inspect the marking on the device. For example, an ADSP-2101 of revision 6.0 will have the following marking: The revision codes for the older versions of each ADSP-21xx device are as follows: Processor Old Functionality New Functionality ADSP-2101 Revision Code ≤ 5.0 Revision Code ≥ 6.0 ADSP-2105 No Revision Code Revision Code ≥ 1.0 ADSP-2115 Revision Code < 1.0 Revision Code ≥ 1.0 ADSP-2111 RevisionCode < 2.0 Revision Code ≥ 2.0 ADSP-2103 Revision code ≤ 5.0 Revision code ≥ 6.0 a ADSP-2101 KS-66 EE/A12345-6.0 ∆ 9234 |
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