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ADM811TARTZ-REEL7 Datasheet(PDF) 7 Page - Analog Devices

Part No. ADM811TARTZ-REEL7
Description  Microprocessor Supervisory Circuit in 4-Lead SOT-143 with DSP
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADM811TARTZ-REEL7 Datasheet(HTML) 7 Page - Analog Devices

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Data Sheet
ADM811/ADM812
Rev. G | Page 7 of 12
CIRCUIT INFORMATION
RESET THRESHOLDS
A reset output is provided to the microprocessor whenever the
VCC input is below the reset threshold. The actual reset threshold
depends on whether an L, M, T, S, R, or Z suffix is used (see
Table 4).
Table 4. Reset Threshold Options
Model
Reset Threshold (V)
ADM811LART
4.63
ADM811MART
4.38
ADM811TART
3.08
ADM811-3TART
3.08
ADM811SART
2.93
ADM811RART
2.63
ADM811ZART
2.32
ADM812LART
4.63
ADM812MART
4.38
ADM812TART
3.08
ADM812SART
2.93
ADM812RART
2.63
ADM812ZART
2.32
RESET OUTPUT
On power-up and after VCC rises above the reset threshold, an
internal timer holds the reset output active for 240 ms (typical).
This is intended as a power-on reset signal for the processor. It
allows time for both the power supply and the microprocessor
to stabilize after power-up. If a power supply brownout or
interruption occurs, the reset output is similarly activated and
remains active for 240 ms (typical) after the supply recovers.
This allows time for the power supply and microprocessor to
stabilize.
The ADM811 provides an active low reset output (RESET)
while the ADM812 provides an active high output (RESET).
During power-down of the ADM811, the RESET output
remains valid (low) with VCC as low as 1 V. This ensures that
the microprocessor is held in a stable shutdown condition as
the supply falls and also ensures that no spurious activity can
occur via the microprocessor as it powers up.
MANUAL RESET
The ADM811/ADM812 are equipped with a manual reset
input. This input is designed to operate in a noisy environment
where unwanted glitches could be induced. These glitches could
be produced by the bouncing action of a switch contact, or where a
manual reset switch may be located some distance away from
the circuit (the cabling of which can pick up noise).
The manual reset input is guaranteed to ignore logically valid
inputs that are faster than 100 ns and to accept inputs longer in
duration than 10 µs.
GLITCH IMMUNITY
The ADM811/ADM812 contain internal filtering circuitry
providing glitch immunity from fast transient glitches on the
power supply line.
VCC
VREF
VREF
VREF
VREF
RESET
t1
t1
t1 = RESET TIME = 250ms TYPICAL
VREF = RESET VOLTAGE THRESHOLD
Figure 10. Power Fall RESET Timing


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