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AD5203AR10 Datasheet(PDF) 8 Page - Analog Devices |
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AD5203AR10 Datasheet(HTML) 8 Page - Analog Devices |
8 / 12 page AD5203 –8– REV. 0 –Parametric Test Circuits V+ DUT VMS A B W V+ = VDD 1LSB = V+/64 Figure 26. Potentiometer Divider Nonlinearity Error Test Circuit (INL, DNL) NO CONNECT IW DUT VMS A B W Figure 27. Resistor Position Nonlinearity Error (Rheostat Operation; R-INL, R-DNL) IMS VW IW = 1V/RNOMINAL V+ DUT VMS A B W VW2 – [VW1 + IW (RAWII RBW)] IW V+ VDD WHERE VW1 = VMS WHEN IW = 0 AND VW2 = VMS WHEN IW = 1/R RW = –––––––––––––––––––––––––– Figure 28. Wiper Resistance Test Circuit PSRR (dB) = 20 LOG ( ––––– ) PSS (%/%) = ––––––– VMS VDD VMS% VDD% V+ = VDD ± 10% VDD VA ~ V+ VMS A B W Figure 29. Power Supply Sensitivity Test Circuit (PSS, PSRR) ~ A B VIN 2.5V DC OP279 +5V VOUT DUT W OFFSET GND Figure 30. Inverting Programmable Gain Test Circuit ~ AB VIN 2.5V OP279 +5V VOUT DUT W OFFSET GND Figure 31. Noninverting Programmable Gain Test Circuit +15V –15V A B VIN 2.5V OP42 VOUT DUT W OFFSET GND ~ Figure 32. Gain vs. Frequency Test Circuit ISW 0 TO VDD RSW = 0.1V ISW CODE = ØØH 0.1V DUT B W Figure 33. Incremental ON Resistance Test Circuit |
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